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Support architectures with non-coherent caches
authorMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Thu, 12 Feb 2009 21:29:55 +0000 (16:29 -0500)
committerMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Thu, 12 Feb 2009 21:29:55 +0000 (16:29 -0500)
Add
wmc(), rmc() and mc() which turns into barrier() or cache flush depending on the
architecture.

mb(), rmb() and wmb() turns into memory barriers or cache flush depending on the
architecture.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>

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