2 * Atomic exchange operations for the RISC-V architecture. Let GCC do it.
4 * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com>
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25 #ifndef _URCU_ARCH_UATOMIC_RISCV_H
26 #define _URCU_ARCH_UATOMIC_RISCV_H
28 #include <urcu/compiler.h>
29 #include <urcu/system.h>
35 #define UATOMIC_HAS_ATOMIC_BYTE
36 #define UATOMIC_HAS_ATOMIC_SHORT
42 #include <urcu/uatomic/generic.h>
44 #endif /* _URCU_ARCH_UATOMIC_RISCV_H */
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