armv5 archs require write alignment

Reads and writes to unsigned int 32 bit numbers must be address
aligned or the l2 cache can return junk in the high order 16 bits on
reads.

This patch activates the original work done for alignment in ltt for
the UST code.  The config.ac changes will isolate the use of alignment
to the known arch type with the problem.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>