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[lttv.git] / markers-test / test-mark-speed-empty.c

diff --git a/markers-test/test-mark-speed-empty.c b/markers-test/test-mark-speed-empty.c
index f8522d3f9497b9cc3aa74a27183e2bb69505d5c8..e9ea607b85e09cde3c38517d3752e59a2e404d5a 100644 (file)
--- a/markers-test/test-mark-speed-empty.c
+++ b/markers-test/test-mark-speed-empty.c
@@ -10,6 +10,29 @@
 #include <asm/ptrace.h>
 #include <asm/system.h>
 
+static void pmc_flush_cache(void)
+  {
+    register int i;
+    /* write back and invalidate cache (a serializing instruction) */
+
+    __asm__ __volatile__ ( "wbinvd" : : : "memory" );
+
+    /* The wbinvd instruction does not wait for the external caches
+     * to be flushed, but only requests that it be done.  The loop
+     * is to be sure that enough time has elapsed, but the compiler
+     * might simplify or even remove it.  The loop bound is for a
+     * 512 KB L2 cache.  On a Pentium Pro/II/III, the loop uses
+     * 2 cycles per iteration.
+     *
+     * Does wbinvd also cause the TLB to be flushed?
+     * A comment in mtrr.c suggests that it does.
+     */
+    for (i = 0; i < 512*1024; i++) {
+      cpu_relax();
+    }
+  }
+
+
 static void noinline test2(const struct marker *mdata,
         void *call_private, ...)
 {
@@ -52,17 +75,19 @@ static void noinline test2(const struct marker *mdata,
        //asm volatile ("");
 struct proc_dir_entry *pentry = NULL;
 
-int temp __cacheline_aligned = 10;
-int temp2 __cacheline_aligned = 10;
-
 static inline void test(unsigned long arg, unsigned long arg2)
 {
+       volatile int temp[5];
 #ifdef CACHEFLUSH
-       wbinvd();
+       clflush(&current->pid);
+       //pmc_flush_cache();
 #endif
-       temp = (temp + 60) << 10;
+       temp[2] = (temp[0] + 60) << 10;
+       temp[3] = (temp[2] + 60) << 10;
+       temp[4] = (temp[3] + 60) << 10;
+       temp[0] = (temp[4] + 60) << 10;
        barrier();
-       asm volatile ("");
+       asm ("");
        barrier();
        //__my_trace_mark(1, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2);
        //__my_trace_mark(0, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2);
@@ -75,6 +100,10 @@ static int my_open(struct inode *inode, struct file *file)
        unsigned long flags;
 
        local_irq_save(flags);
+#ifdef CACHEFLUSH
+       //pmc_flush_cache();    /* initial write back, without cycle count */
+       //msleep(20);   /* wait for L2 flush */
+#endif
        rdtsc_barrier();
        cycles1 = get_cycles();
        rdtsc_barrier();
@@ -94,7 +123,7 @@ static int my_open(struct inode *inode, struct file *file)
        cycles2 = get_cycles();
        rdtsc_barrier();
        local_irq_restore(flags);
-       printk("cycles : %llu\n", (cycles2-cycles1)/20000);
+       printk("cycles : %llu\n", cycles2-cycles1);
        return -EPERM;
 }