X-Git-Url: https://git.lttng.org/?p=urcu.git;a=blobdiff_plain;f=tests%2Ftest_rwlock.c;fp=tests%2Ftest_rwlock.c;h=923ecad946b050e4c1535efba941aa8d5cdf1b1b;hp=d3f072ce14350e2c54b6cdb07c13e42f50ed1e87;hb=b4e52e3e9e563d38607a8e0ab0aa72e7ab2b47b4;hpb=49d7d158702c3d9fa3e62e5965dbd1a5b898b9c7

diff --git a/tests/test_rwlock.c b/tests/test_rwlock.c
index d3f072c..923ecad 100644
--- a/tests/test_rwlock.c
+++ b/tests/test_rwlock.c
@@ -35,9 +35,6 @@
 
 #include <urcu/arch.h>
 
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
-
 /* hardcoded number of CPUs */
 #define NR_CPUS 16384