X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=ltt%2Fbranches%2Fpoly%2Fdoc%2Fdeveloper%2Flttng-lttv-compatibility.html;h=4629cd5e5e1eadd5663b6364fd76e4ff3a8fb90d;hb=da5d36a50b831b928c945ff2ab29767dc8de33a9;hp=d463ce40f34fe232a4ad05ced1b2154b05054278;hpb=61082636055b3f512c35bd127e7a76df2d7998bc;p=lttv.git diff --git a/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html b/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html index d463ce40..4629cd5e 100644 --- a/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html +++ b/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html @@ -6,30 +6,54 @@ Quick list of compatible LTTV and LTTng versions :



- - +
+ - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + @@ -1442,6 +1466,109 @@ LTTng 0.6.0 with markers and probes.
+ + + + + + + + + + + + + + + + + + + + + + +
LTTV
-
LTTng
-
LTT Control
-
LTTng modules
-
LTTng userspace tracer
-
Genevent
-
Trace Major.Minor
-
Kernels-architectures
-
Comments
-
LTTV
+
LTTng
+
LTT Control
+
LTTng modules
+
LTTng userspace tracer
+
Genevent
+
Trace Major.Minor
+
Kernels-architectures
+
Comments
+
LTTV
+
LTTng
+
LTT Control
+
LTTng modules
+
LTTng userspace tracer
+
Genevent
+
Trace Major.Minor
+
Kernels-architectures
+
Comments
+
0.6.9
+0.8.61
+0.8.62
+
+0.6.2
+
+0.26
+
+obsolete
+
+0.20
+
+0.29
+
+0.7
+
+2.6.18 (git)
+2.6.18 (tarball)
+
+2.6.18 kernel.
+
+
+0.8.61
+0.8.62
+0.8.63
+0.8.64
+0.8.65
+0.8.66
+0.8.67
+0.8.68
+0.8.69
+
+0.6.3
+0.6.4
+0.6.5
+0.6.6
+0.6.7
+0.6.8
+0.6.9
+0.6.10
+0.6.11
+0.6.13
+0.6.14
+0.6.15
+0.6.16
+0.6.17
+0.6.18
+0.6.19
+0.6.20
+0.6.21
+0.6.22
+0.6.23
+0.6.24
+0.6.25
+
+0.27
+0.28
+
+obsolete
+
+0.20
+0.21
+
+0.29
+0.30
+
+0.7
+
+2.6.18 (git)
+2.6.18 (tarball)
+
+Locking, hardirq and softirq instrumentation.
+Coding style fixes.
+Round to count order for subbuffer size and number of subbuffers.
+Fix ltt-statedump with unnamed irq chips.
+LTTng 0.6.18 fixes an important bug in LTT statedump (semaphore on the +stack).
+LTTng 0.6.23 implements optimisez per-cpu atomic operations for non shared +variables. It provides cheap NMI protection.
+
+