#include <assert.h>
#include <sys/syscall.h>
#include <sched.h>
+#include <errno.h>
#include <urcu/arch.h>
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
-
/* hardcoded number of CPUs */
#define NR_CPUS 16384