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b6b17880 MD |
1 | |
2 | // Poison value for freed memory | |
3 | #define POISON 1 | |
4 | // Memory with correct data | |
5 | #define WINE 0 | |
6 | #define SLAB_SIZE 2 | |
7 | ||
8 | #define read_poison (data_read_first[0] == POISON) | |
9 | ||
10 | #define RCU_GP_CTR_BIT (1 << 7) | |
11 | #define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) | |
12 | ||
13 | //disabled | |
14 | #define REMOTE_BARRIERS | |
15 | ||
16 | #define ARCH_ALPHA | |
17 | //#define ARCH_INTEL | |
18 | //#define ARCH_POWERPC | |
19 | /* | |
20 | * mem.spin: Promela code to validate memory barriers with OOO memory | |
21 | * and out-of-order instruction scheduling. | |
22 | * | |
23 | * This program is free software; you can redistribute it and/or modify | |
24 | * it under the terms of the GNU General Public License as published by | |
25 | * the Free Software Foundation; either version 2 of the License, or | |
26 | * (at your option) any later version. | |
27 | * | |
28 | * This program is distributed in the hope that it will be useful, | |
29 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
30 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
31 | * GNU General Public License for more details. | |
32 | * | |
33 | * You should have received a copy of the GNU General Public License | |
34 | * along with this program; if not, write to the Free Software | |
35 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
36 | * | |
37 | * Copyright (c) 2009 Mathieu Desnoyers | |
38 | */ | |
39 | ||
40 | /* Promela validation variables. */ | |
41 | ||
42 | /* specific defines "included" here */ | |
43 | /* DEFINES file "included" here */ | |
44 | ||
45 | #define NR_READERS 1 | |
46 | #define NR_WRITERS 1 | |
47 | ||
48 | #define NR_PROCS 2 | |
49 | ||
50 | #define get_pid() (_pid) | |
51 | ||
52 | #define get_readerid() (get_pid()) | |
53 | ||
54 | /* | |
55 | * Produced process control and data flow. Updated after each instruction to | |
56 | * show which variables are ready. Using one-hot bit encoding per variable to | |
57 | * save state space. Used as triggers to execute the instructions having those | |
58 | * variables as input. Leaving bits active to inhibit instruction execution. | |
59 | * Scheme used to make instruction disabling and automatic dependency fall-back | |
60 | * automatic. | |
61 | */ | |
62 | ||
63 | #define CONSUME_TOKENS(state, bits, notbits) \ | |
64 | ((!(state & (notbits))) && (state & (bits)) == (bits)) | |
65 | ||
66 | #define PRODUCE_TOKENS(state, bits) \ | |
67 | state = state | (bits); | |
68 | ||
69 | #define CLEAR_TOKENS(state, bits) \ | |
70 | state = state & ~(bits) | |
71 | ||
72 | /* | |
73 | * Types of dependency : | |
74 | * | |
75 | * Data dependency | |
76 | * | |
77 | * - True dependency, Read-after-Write (RAW) | |
78 | * | |
79 | * This type of dependency happens when a statement depends on the result of a | |
80 | * previous statement. This applies to any statement which needs to read a | |
81 | * variable written by a preceding statement. | |
82 | * | |
83 | * - False dependency, Write-after-Read (WAR) | |
84 | * | |
85 | * Typically, variable renaming can ensure that this dependency goes away. | |
86 | * However, if the statements must read and then write from/to the same variable | |
87 | * in the OOO memory model, renaming may be impossible, and therefore this | |
88 | * causes a WAR dependency. | |
89 | * | |
90 | * - Output dependency, Write-after-Write (WAW) | |
91 | * | |
92 | * Two writes to the same variable in subsequent statements. Variable renaming | |
93 | * can ensure this is not needed, but can be required when writing multiple | |
94 | * times to the same OOO mem model variable. | |
95 | * | |
96 | * Control dependency | |
97 | * | |
98 | * Execution of a given instruction depends on a previous instruction evaluating | |
99 | * in a way that allows its execution. E.g. : branches. | |
100 | * | |
101 | * Useful considerations for joining dependencies after branch | |
102 | * | |
103 | * - Pre-dominance | |
104 | * | |
105 | * "We say box i dominates box j if every path (leading from input to output | |
106 | * through the diagram) which passes through box j must also pass through box | |
107 | * i. Thus box i dominates box j if box j is subordinate to box i in the | |
108 | * program." | |
109 | * | |
110 | * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf | |
111 | * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) | |
112 | * | |
113 | * - Post-dominance | |
114 | * | |
115 | * Just as pre-dominance, but with arcs of the data flow inverted, and input vs | |
116 | * output exchanged. Therefore, i post-dominating j ensures that every path | |
117 | * passing by j will pass by i before reaching the output. | |
118 | * | |
119 | * Prefetch and speculative execution | |
120 | * | |
121 | * If an instruction depends on the result of a previous branch, but it does not | |
122 | * have side-effects, it can be executed before the branch result is known. | |
123 | * however, it must be restarted if a core-synchronizing instruction is issued. | |
124 | * Note that instructions which depend on the speculative instruction result | |
125 | * but that have side-effects must depend on the branch completion in addition | |
126 | * to the speculatively executed instruction. | |
127 | * | |
128 | * Other considerations | |
129 | * | |
130 | * Note about "volatile" keyword dependency : The compiler will order volatile | |
131 | * accesses so they appear in the right order on a given CPU. They can be | |
132 | * reordered by the CPU instruction scheduling. This therefore cannot be | |
133 | * considered as a depencency. | |
134 | * | |
135 | * References : | |
136 | * | |
137 | * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan | |
138 | * Kaufmann. ISBN 1-55860-698-X. | |
139 | * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern | |
140 | * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN | |
141 | * 1-55860-286-0. | |
142 | * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. | |
143 | * Morgan Kaufmann. ISBN 1-55860-320-4. | |
144 | */ | |
145 | ||
146 | /* | |
147 | * Note about loops and nested calls | |
148 | * | |
149 | * To keep this model simple, loops expressed in the framework will behave as if | |
150 | * there was a core synchronizing instruction between loops. To see the effect | |
151 | * of loop unrolling, manually unrolling loops is required. Note that if loops | |
152 | * end or start with a core synchronizing instruction, the model is appropriate. | |
153 | * Nested calls are not supported. | |
154 | */ | |
155 | ||
156 | /* | |
157 | * Only Alpha has out-of-order cache bank loads. Other architectures (intel, | |
158 | * powerpc, arm) ensure that dependent reads won't be reordered. c.f. | |
159 | * http://www.linuxjournal.com/article/8212) | |
160 | */ | |
161 | #ifdef ARCH_ALPHA | |
162 | #define HAVE_OOO_CACHE_READ | |
163 | #endif | |
164 | ||
165 | /* | |
166 | * Each process have its own data in cache. Caches are randomly updated. | |
167 | * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces | |
168 | * both. | |
169 | */ | |
170 | ||
171 | typedef per_proc_byte { | |
172 | byte val[NR_PROCS]; | |
173 | }; | |
174 | ||
175 | typedef per_proc_bit { | |
176 | bit val[NR_PROCS]; | |
177 | }; | |
178 | ||
179 | /* Bitfield has a maximum of 8 procs */ | |
180 | typedef per_proc_bitfield { | |
181 | byte bitfield; | |
182 | }; | |
183 | ||
184 | #define DECLARE_CACHED_VAR(type, x) \ | |
185 | type mem_##x; | |
186 | ||
187 | #define DECLARE_PROC_CACHED_VAR(type, x)\ | |
188 | type cached_##x; \ | |
189 | bit cache_dirty_##x; | |
190 | ||
191 | #define INIT_CACHED_VAR(x, v) \ | |
192 | mem_##x = v; | |
193 | ||
194 | #define INIT_PROC_CACHED_VAR(x, v) \ | |
195 | cache_dirty_##x = 0; \ | |
196 | cached_##x = v; | |
197 | ||
198 | #define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) | |
199 | ||
200 | #define READ_CACHED_VAR(x) (cached_##x) | |
201 | ||
202 | #define WRITE_CACHED_VAR(x, v) \ | |
203 | atomic { \ | |
204 | cached_##x = v; \ | |
205 | cache_dirty_##x = 1; \ | |
206 | } | |
207 | ||
208 | #define CACHE_WRITE_TO_MEM(x, id) \ | |
209 | if \ | |
210 | :: IS_CACHE_DIRTY(x, id) -> \ | |
211 | mem_##x = cached_##x; \ | |
212 | cache_dirty_##x = 0; \ | |
213 | :: else -> \ | |
214 | skip \ | |
215 | fi; | |
216 | ||
217 | #define CACHE_READ_FROM_MEM(x, id) \ | |
218 | if \ | |
219 | :: !IS_CACHE_DIRTY(x, id) -> \ | |
220 | cached_##x = mem_##x; \ | |
221 | :: else -> \ | |
222 | skip \ | |
223 | fi; | |
224 | ||
225 | /* | |
226 | * May update other caches if cache is dirty, or not. | |
227 | */ | |
228 | #define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ | |
229 | if \ | |
230 | :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ | |
231 | :: 1 -> skip \ | |
232 | fi; | |
233 | ||
234 | #define RANDOM_CACHE_READ_FROM_MEM(x, id)\ | |
235 | if \ | |
236 | :: 1 -> CACHE_READ_FROM_MEM(x, id); \ | |
237 | :: 1 -> skip \ | |
238 | fi; | |
239 | ||
240 | /* Must consume all prior read tokens. All subsequent reads depend on it. */ | |
241 | inline smp_rmb(i) | |
242 | { | |
243 | atomic { | |
244 | CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); | |
245 | i = 0; | |
246 | do | |
247 | :: i < NR_READERS -> | |
248 | CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); | |
249 | i++ | |
250 | :: i >= NR_READERS -> break | |
251 | od; | |
252 | CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); | |
253 | i = 0; | |
254 | do | |
255 | :: i < SLAB_SIZE -> | |
256 | CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); | |
257 | i++ | |
258 | :: i >= SLAB_SIZE -> break | |
259 | od; | |
260 | } | |
261 | } | |
262 | ||
263 | /* Must consume all prior write tokens. All subsequent writes depend on it. */ | |
264 | inline smp_wmb(i) | |
265 | { | |
266 | atomic { | |
267 | CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); | |
268 | i = 0; | |
269 | do | |
270 | :: i < NR_READERS -> | |
271 | CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); | |
272 | i++ | |
273 | :: i >= NR_READERS -> break | |
274 | od; | |
275 | CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); | |
276 | i = 0; | |
277 | do | |
278 | :: i < SLAB_SIZE -> | |
279 | CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); | |
280 | i++ | |
281 | :: i >= SLAB_SIZE -> break | |
282 | od; | |
283 | } | |
284 | } | |
285 | ||
286 | /* Synchronization point. Must consume all prior read and write tokens. All | |
287 | * subsequent reads and writes depend on it. */ | |
288 | inline smp_mb(i) | |
289 | { | |
290 | atomic { | |
291 | smp_wmb(i); | |
292 | smp_rmb(i); | |
293 | } | |
294 | } | |
295 | ||
296 | #ifdef REMOTE_BARRIERS | |
297 | ||
298 | bit reader_barrier[NR_READERS]; | |
299 | ||
300 | /* | |
301 | * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode | |
302 | * because they would add unexisting core synchronization and would therefore | |
303 | * create an incomplete model. | |
304 | * Therefore, we model the read-side memory barriers by completely disabling the | |
305 | * memory barriers and their dependencies from the read-side. One at a time | |
306 | * (different verification runs), we make a different instruction listen for | |
307 | * signals. | |
308 | */ | |
309 | ||
310 | #define smp_mb_reader(i, j) | |
311 | ||
312 | /* | |
313 | * Service 0, 1 or many barrier requests. | |
314 | */ | |
315 | inline smp_mb_recv(i, j) | |
316 | { | |
317 | do | |
318 | :: (reader_barrier[get_readerid()] == 1) -> | |
319 | /* | |
320 | * We choose to ignore cycles caused by writer busy-looping, | |
321 | * waiting for the reader, sending barrier requests, and the | |
322 | * reader always services them without continuing execution. | |
323 | */ | |
324 | progress_ignoring_mb1: | |
325 | smp_mb(i); | |
326 | reader_barrier[get_readerid()] = 0; | |
327 | :: 1 -> | |
328 | /* | |
329 | * We choose to ignore writer's non-progress caused by the | |
330 | * reader ignoring the writer's mb() requests. | |
331 | */ | |
332 | progress_ignoring_mb2: | |
333 | break; | |
334 | od; | |
335 | } | |
336 | ||
337 | #define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: | |
338 | ||
339 | #define smp_mb_send(i, j, progressid) \ | |
340 | { \ | |
341 | smp_mb(i); \ | |
342 | i = 0; \ | |
343 | do \ | |
344 | :: i < NR_READERS -> \ | |
345 | reader_barrier[i] = 1; \ | |
346 | /* \ | |
347 | * Busy-looping waiting for reader barrier handling is of little\ | |
348 | * interest, given the reader has the ability to totally ignore \ | |
349 | * barrier requests. \ | |
350 | */ \ | |
351 | do \ | |
352 | :: (reader_barrier[i] == 1) -> \ | |
353 | PROGRESS_LABEL(progressid) \ | |
354 | skip; \ | |
355 | :: (reader_barrier[i] == 0) -> break; \ | |
356 | od; \ | |
357 | i++; \ | |
358 | :: i >= NR_READERS -> \ | |
359 | break \ | |
360 | od; \ | |
361 | smp_mb(i); \ | |
362 | } | |
363 | ||
364 | #else | |
365 | ||
366 | #define smp_mb_send(i, j, progressid) smp_mb(i) | |
367 | #define smp_mb_reader(i, j) smp_mb(i) | |
368 | #define smp_mb_recv(i, j) | |
369 | ||
370 | #endif | |
371 | ||
372 | /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ | |
373 | DECLARE_CACHED_VAR(byte, urcu_gp_ctr); | |
374 | /* Note ! currently only one reader */ | |
375 | DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); | |
376 | /* RCU data */ | |
377 | DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); | |
378 | ||
379 | /* RCU pointer */ | |
380 | #if (SLAB_SIZE == 2) | |
381 | DECLARE_CACHED_VAR(bit, rcu_ptr); | |
382 | bit ptr_read_first[NR_READERS]; | |
383 | #else | |
384 | DECLARE_CACHED_VAR(byte, rcu_ptr); | |
385 | byte ptr_read_first[NR_READERS]; | |
386 | #endif | |
387 | ||
388 | bit data_read_first[NR_READERS]; | |
389 | ||
390 | bit init_done = 0; | |
391 | ||
392 | inline wait_init_done() | |
393 | { | |
394 | do | |
395 | :: init_done == 0 -> skip; | |
396 | :: else -> break; | |
397 | od; | |
398 | } | |
399 | ||
400 | inline ooo_mem(i) | |
401 | { | |
402 | atomic { | |
403 | RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); | |
404 | i = 0; | |
405 | do | |
406 | :: i < NR_READERS -> | |
407 | RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], | |
408 | get_pid()); | |
409 | i++ | |
410 | :: i >= NR_READERS -> break | |
411 | od; | |
412 | RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); | |
413 | i = 0; | |
414 | do | |
415 | :: i < SLAB_SIZE -> | |
416 | RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); | |
417 | i++ | |
418 | :: i >= SLAB_SIZE -> break | |
419 | od; | |
420 | #ifdef HAVE_OOO_CACHE_READ | |
421 | RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); | |
422 | i = 0; | |
423 | do | |
424 | :: i < NR_READERS -> | |
425 | RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], | |
426 | get_pid()); | |
427 | i++ | |
428 | :: i >= NR_READERS -> break | |
429 | od; | |
430 | RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); | |
431 | i = 0; | |
432 | do | |
433 | :: i < SLAB_SIZE -> | |
434 | RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); | |
435 | i++ | |
436 | :: i >= SLAB_SIZE -> break | |
437 | od; | |
438 | #else | |
439 | smp_rmb(i); | |
440 | #endif /* HAVE_OOO_CACHE_READ */ | |
441 | } | |
442 | } | |
443 | ||
444 | /* | |
445 | * Bit encoding, urcu_reader : | |
446 | */ | |
447 | ||
448 | int _proc_urcu_reader; | |
449 | #define proc_urcu_reader _proc_urcu_reader | |
450 | ||
451 | /* Body of PROCEDURE_READ_LOCK */ | |
452 | #define READ_PROD_A_READ (1 << 0) | |
453 | #define READ_PROD_B_IF_TRUE (1 << 1) | |
454 | #define READ_PROD_B_IF_FALSE (1 << 2) | |
455 | #define READ_PROD_C_IF_TRUE_READ (1 << 3) | |
456 | ||
457 | #define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ | |
458 | :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ | |
459 | ooo_mem(i); \ | |
460 | tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ | |
461 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ | |
462 | :: CONSUME_TOKENS(proc_urcu_reader, \ | |
463 | READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ | |
464 | (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ | |
465 | if \ | |
466 | :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ | |
467 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ | |
468 | :: else -> \ | |
469 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ | |
470 | fi; \ | |
471 | /* IF TRUE */ \ | |
472 | :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ | |
473 | READ_PROD_C_IF_TRUE_READ << base) -> \ | |
474 | ooo_mem(i); \ | |
475 | tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ | |
476 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ | |
477 | :: CONSUME_TOKENS(proc_urcu_reader, \ | |
478 | (READ_PROD_B_IF_TRUE \ | |
479 | | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ | |
480 | | READ_PROD_A_READ) << base, /* WAR */ \ | |
481 | producetoken) -> \ | |
482 | ooo_mem(i); \ | |
483 | WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ | |
484 | PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ | |
485 | /* IF_MERGE implies \ | |
486 | * post-dominance */ \ | |
487 | /* ELSE */ \ | |
488 | :: CONSUME_TOKENS(proc_urcu_reader, \ | |
489 | (READ_PROD_B_IF_FALSE /* pre-dominant */ \ | |
490 | | READ_PROD_A_READ) << base, /* WAR */ \ | |
491 | producetoken) -> \ | |
492 | ooo_mem(i); \ | |
493 | WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ | |
494 | tmp + 1); \ | |
495 | PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ | |
496 | /* IF_MERGE implies \ | |
497 | * post-dominance */ \ | |
498 | /* ENDIF */ \ | |
499 | skip | |
500 | ||
501 | /* Body of PROCEDURE_READ_LOCK */ | |
502 | #define READ_PROC_READ_UNLOCK (1 << 0) | |
503 | ||
504 | #define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ | |
505 | :: CONSUME_TOKENS(proc_urcu_reader, \ | |
506 | consumetoken, \ | |
507 | READ_PROC_READ_UNLOCK << base) -> \ | |
508 | ooo_mem(i); \ | |
509 | tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ | |
510 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ | |
511 | :: CONSUME_TOKENS(proc_urcu_reader, \ | |
512 | consumetoken \ | |
513 | | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ | |
514 | producetoken) -> \ | |
515 | ooo_mem(i); \ | |
516 | WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ | |
517 | PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ | |
518 | skip | |
519 | ||
520 | ||
521 | #define READ_PROD_NONE (1 << 0) | |
522 | ||
523 | /* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ | |
524 | #define READ_LOCK_BASE 1 | |
525 | #define READ_LOCK_OUT (1 << 5) | |
526 | ||
527 | #define READ_PROC_FIRST_MB (1 << 6) | |
528 | ||
529 | #define READ_PROC_READ_GEN (1 << 12) | |
530 | #define READ_PROC_ACCESS_GEN (1 << 13) | |
531 | ||
532 | #define READ_PROC_SECOND_MB (1 << 16) | |
533 | ||
534 | /* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ | |
535 | #define READ_UNLOCK_BASE 17 | |
536 | #define READ_UNLOCK_OUT (1 << 18) | |
537 | ||
538 | /* Should not include branches */ | |
539 | #define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ | |
540 | | READ_LOCK_OUT \ | |
541 | | READ_PROC_FIRST_MB \ | |
542 | | READ_PROC_READ_GEN \ | |
543 | | READ_PROC_ACCESS_GEN \ | |
544 | | READ_PROC_SECOND_MB \ | |
545 | | READ_UNLOCK_OUT) | |
546 | ||
547 | /* Must clear all tokens, including branches */ | |
548 | #define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) | |
549 | ||
550 | inline urcu_one_read(i, j, nest_i, tmp, tmp2) | |
551 | { | |
552 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); | |
553 | ||
554 | #ifdef NO_MB | |
555 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); | |
556 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); | |
557 | #endif | |
558 | ||
559 | #ifdef REMOTE_BARRIERS | |
560 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); | |
561 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); | |
562 | #endif | |
563 | ||
564 | do | |
565 | :: 1 -> | |
566 | ||
567 | #ifdef REMOTE_BARRIERS | |
568 | /* | |
569 | * Signal-based memory barrier will only execute when the | |
570 | * execution order appears in program order. | |
571 | */ | |
572 | if | |
573 | :: 1 -> | |
574 | atomic { | |
575 | if | |
576 | :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, | |
577 | READ_LOCK_OUT | |
578 | | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | |
579 | | READ_UNLOCK_OUT) | |
580 | || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | |
581 | | READ_LOCK_OUT, | |
582 | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | |
583 | | READ_UNLOCK_OUT) | |
584 | || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | |
585 | | READ_LOCK_OUT | |
586 | | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN | |
587 | | READ_UNLOCK_OUT) | |
588 | || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | |
589 | | READ_LOCK_OUT | |
590 | | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, | |
591 | READ_UNLOCK_OUT) | |
592 | || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | |
593 | | READ_LOCK_OUT | |
594 | | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | |
595 | | READ_UNLOCK_OUT, 0) -> | |
596 | goto non_atomic3; | |
597 | non_atomic3_end: | |
598 | skip; | |
599 | fi; | |
600 | } | |
601 | fi; | |
602 | ||
603 | goto non_atomic3_skip; | |
604 | non_atomic3: | |
605 | smp_mb_recv(i, j); | |
606 | goto non_atomic3_end; | |
607 | non_atomic3_skip: | |
608 | ||
609 | #endif /* REMOTE_BARRIERS */ | |
610 | ||
611 | atomic { | |
612 | if | |
613 | PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); | |
614 | ||
615 | :: CONSUME_TOKENS(proc_urcu_reader, | |
616 | READ_LOCK_OUT, /* post-dominant */ | |
617 | READ_PROC_FIRST_MB) -> | |
618 | smp_mb_reader(i, j); | |
619 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); | |
620 | ||
621 | :: CONSUME_TOKENS(proc_urcu_reader, | |
622 | READ_PROC_FIRST_MB, /* mb() orders reads */ | |
623 | READ_PROC_READ_GEN) -> | |
624 | ooo_mem(i); | |
625 | ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); | |
626 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); | |
627 | ||
628 | :: CONSUME_TOKENS(proc_urcu_reader, | |
629 | READ_PROC_FIRST_MB /* mb() orders reads */ | |
630 | | READ_PROC_READ_GEN, | |
631 | READ_PROC_ACCESS_GEN) -> | |
632 | /* smp_read_barrier_depends */ | |
633 | goto rmb1; | |
634 | rmb1_end: | |
635 | data_read_first[get_readerid()] = | |
636 | READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); | |
637 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); | |
638 | ||
639 | ||
640 | :: CONSUME_TOKENS(proc_urcu_reader, | |
641 | READ_PROC_ACCESS_GEN /* mb() orders reads */ | |
642 | | READ_PROC_READ_GEN /* mb() orders reads */ | |
643 | | READ_PROC_FIRST_MB /* mb() ordered */ | |
644 | | READ_LOCK_OUT, /* post-dominant */ | |
645 | READ_PROC_SECOND_MB) -> | |
646 | smp_mb_reader(i, j); | |
647 | PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); | |
648 | ||
649 | PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, | |
650 | READ_PROC_SECOND_MB /* mb() orders reads */ | |
651 | | READ_PROC_FIRST_MB /* mb() orders reads */ | |
652 | | READ_LOCK_OUT, /* RAW */ | |
653 | READ_UNLOCK_OUT); | |
654 | ||
655 | :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> | |
656 | CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); | |
657 | break; | |
658 | fi; | |
659 | } | |
660 | od; | |
661 | /* | |
662 | * Dependency between consecutive loops : | |
663 | * RAW dependency on | |
664 | * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) | |
665 | * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); | |
666 | * between loops. | |
667 | * _WHEN THE MB()s are in place_, they add full ordering of the | |
668 | * generation pointer read wrt active reader count read, which ensures | |
669 | * execution will not spill across loop execution. | |
670 | * However, in the event mb()s are removed (execution using signal | |
671 | * handler to promote barrier()() -> smp_mb()), nothing prevents one loop | |
672 | * to spill its execution on other loop's execution. | |
673 | */ | |
674 | goto end; | |
675 | rmb1: | |
676 | #ifndef NO_RMB | |
677 | smp_rmb(i); | |
678 | #else | |
679 | ooo_mem(i); | |
680 | #endif | |
681 | goto rmb1_end; | |
682 | end: | |
683 | skip; | |
684 | } | |
685 | ||
686 | ||
687 | ||
688 | active proctype urcu_reader() | |
689 | { | |
690 | byte i, j, nest_i; | |
691 | byte tmp, tmp2; | |
692 | ||
693 | /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ | |
694 | DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); | |
695 | /* Note ! currently only one reader */ | |
696 | DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); | |
697 | /* RCU data */ | |
698 | DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); | |
699 | ||
700 | /* RCU pointer */ | |
701 | #if (SLAB_SIZE == 2) | |
702 | DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); | |
703 | #else | |
704 | DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); | |
705 | #endif | |
706 | ||
707 | atomic { | |
708 | INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); | |
709 | INIT_PROC_CACHED_VAR(rcu_ptr, 0); | |
710 | ||
711 | i = 0; | |
712 | do | |
713 | :: i < NR_READERS -> | |
714 | INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); | |
715 | i++; | |
716 | :: i >= NR_READERS -> break | |
717 | od; | |
718 | INIT_PROC_CACHED_VAR(rcu_data[0], WINE); | |
719 | i = 1; | |
720 | do | |
721 | :: i < SLAB_SIZE -> | |
722 | INIT_PROC_CACHED_VAR(rcu_data[i], POISON); | |
723 | i++ | |
724 | :: i >= SLAB_SIZE -> break | |
725 | od; | |
726 | } | |
727 | ||
728 | wait_init_done(); | |
729 | ||
730 | assert(get_pid() < NR_PROCS); | |
731 | ||
732 | end_reader: | |
733 | do | |
734 | :: 1 -> | |
735 | /* | |
736 | * We do not test reader's progress here, because we are mainly | |
737 | * interested in writer's progress. The reader never blocks | |
738 | * anyway. We have to test for reader/writer's progress | |
739 | * separately, otherwise we could think the writer is doing | |
740 | * progress when it's blocked by an always progressing reader. | |
741 | */ | |
742 | #ifdef READER_PROGRESS | |
743 | progress_reader: | |
744 | #endif | |
745 | urcu_one_read(i, j, nest_i, tmp, tmp2); | |
746 | od; | |
747 | } | |
748 | ||
749 | /* no name clash please */ | |
750 | #undef proc_urcu_reader | |
751 | ||
752 | ||
753 | /* Model the RCU update process. */ | |
754 | ||
755 | /* | |
756 | * Bit encoding, urcu_writer : | |
757 | * Currently only supports one reader. | |
758 | */ | |
759 | ||
760 | int _proc_urcu_writer; | |
761 | #define proc_urcu_writer _proc_urcu_writer | |
762 | ||
763 | #define WRITE_PROD_NONE (1 << 0) | |
764 | ||
765 | #define WRITE_DATA (1 << 1) | |
766 | #define WRITE_PROC_WMB (1 << 2) | |
767 | #define WRITE_XCHG_PTR (1 << 3) | |
768 | ||
769 | #define WRITE_PROC_FIRST_MB (1 << 4) | |
770 | ||
771 | /* first flip */ | |
772 | #define WRITE_PROC_FIRST_READ_GP (1 << 5) | |
773 | #define WRITE_PROC_FIRST_WRITE_GP (1 << 6) | |
774 | #define WRITE_PROC_FIRST_WAIT (1 << 7) | |
775 | #define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) | |
776 | ||
777 | /* second flip */ | |
778 | #define WRITE_PROC_SECOND_READ_GP (1 << 9) | |
779 | #define WRITE_PROC_SECOND_WRITE_GP (1 << 10) | |
780 | #define WRITE_PROC_SECOND_WAIT (1 << 11) | |
781 | #define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) | |
782 | ||
783 | #define WRITE_PROC_SECOND_MB (1 << 13) | |
784 | ||
785 | #define WRITE_FREE (1 << 14) | |
786 | ||
787 | #define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ | |
788 | | WRITE_DATA \ | |
789 | | WRITE_PROC_WMB \ | |
790 | | WRITE_XCHG_PTR \ | |
791 | | WRITE_PROC_FIRST_MB \ | |
792 | | WRITE_PROC_FIRST_READ_GP \ | |
793 | | WRITE_PROC_FIRST_WRITE_GP \ | |
794 | | WRITE_PROC_FIRST_WAIT \ | |
795 | | WRITE_PROC_SECOND_READ_GP \ | |
796 | | WRITE_PROC_SECOND_WRITE_GP \ | |
797 | | WRITE_PROC_SECOND_WAIT \ | |
798 | | WRITE_PROC_SECOND_MB \ | |
799 | | WRITE_FREE) | |
800 | ||
801 | #define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) | |
802 | ||
803 | /* | |
804 | * Mutexes are implied around writer execution. A single writer at a time. | |
805 | */ | |
806 | active proctype urcu_writer() | |
807 | { | |
808 | byte i, j; | |
809 | byte tmp, tmp2, tmpa; | |
810 | byte cur_data = 0, old_data, loop_nr = 0; | |
811 | byte cur_gp_val = 0; /* | |
812 | * Keep a local trace of the current parity so | |
813 | * we don't add non-existing dependencies on the global | |
814 | * GP update. Needed to test single flip case. | |
815 | */ | |
816 | ||
817 | /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ | |
818 | DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); | |
819 | /* Note ! currently only one reader */ | |
820 | DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); | |
821 | /* RCU data */ | |
822 | DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); | |
823 | ||
824 | /* RCU pointer */ | |
825 | #if (SLAB_SIZE == 2) | |
826 | DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); | |
827 | #else | |
828 | DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); | |
829 | #endif | |
830 | ||
831 | atomic { | |
832 | INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); | |
833 | INIT_PROC_CACHED_VAR(rcu_ptr, 0); | |
834 | ||
835 | i = 0; | |
836 | do | |
837 | :: i < NR_READERS -> | |
838 | INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); | |
839 | i++; | |
840 | :: i >= NR_READERS -> break | |
841 | od; | |
842 | INIT_PROC_CACHED_VAR(rcu_data[0], WINE); | |
843 | i = 1; | |
844 | do | |
845 | :: i < SLAB_SIZE -> | |
846 | INIT_PROC_CACHED_VAR(rcu_data[i], POISON); | |
847 | i++ | |
848 | :: i >= SLAB_SIZE -> break | |
849 | od; | |
850 | } | |
851 | ||
852 | ||
853 | wait_init_done(); | |
854 | ||
855 | assert(get_pid() < NR_PROCS); | |
856 | ||
857 | do | |
858 | :: (loop_nr < 3) -> | |
859 | #ifdef WRITER_PROGRESS | |
860 | progress_writer1: | |
861 | #endif | |
862 | loop_nr = loop_nr + 1; | |
863 | ||
864 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); | |
865 | ||
866 | #ifdef NO_WMB | |
867 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); | |
868 | #endif | |
869 | ||
870 | #ifdef NO_MB | |
871 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); | |
872 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); | |
873 | #endif | |
874 | ||
875 | #ifdef SINGLE_FLIP | |
876 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); | |
877 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); | |
878 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); | |
879 | /* For single flip, we need to know the current parity */ | |
880 | cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; | |
881 | #endif | |
882 | ||
883 | do :: 1 -> | |
884 | atomic { | |
885 | if | |
886 | ||
887 | :: CONSUME_TOKENS(proc_urcu_writer, | |
888 | WRITE_PROD_NONE, | |
889 | WRITE_DATA) -> | |
890 | ooo_mem(i); | |
891 | cur_data = (cur_data + 1) % SLAB_SIZE; | |
892 | WRITE_CACHED_VAR(rcu_data[cur_data], WINE); | |
893 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); | |
894 | ||
895 | ||
896 | :: CONSUME_TOKENS(proc_urcu_writer, | |
897 | WRITE_DATA, | |
898 | WRITE_PROC_WMB) -> | |
899 | smp_wmb(i); | |
900 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); | |
901 | ||
902 | :: CONSUME_TOKENS(proc_urcu_writer, | |
903 | WRITE_PROC_WMB, | |
904 | WRITE_XCHG_PTR) -> | |
905 | /* rcu_xchg_pointer() */ | |
906 | atomic { | |
907 | old_data = READ_CACHED_VAR(rcu_ptr); | |
908 | WRITE_CACHED_VAR(rcu_ptr, cur_data); | |
909 | } | |
910 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); | |
911 | ||
912 | :: CONSUME_TOKENS(proc_urcu_writer, | |
913 | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, | |
914 | WRITE_PROC_FIRST_MB) -> | |
915 | goto smp_mb_send1; | |
916 | smp_mb_send1_end: | |
917 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); | |
918 | ||
919 | /* first flip */ | |
920 | :: CONSUME_TOKENS(proc_urcu_writer, | |
921 | WRITE_PROC_FIRST_MB, | |
922 | WRITE_PROC_FIRST_READ_GP) -> | |
923 | tmpa = READ_CACHED_VAR(urcu_gp_ctr); | |
924 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); | |
925 | :: CONSUME_TOKENS(proc_urcu_writer, | |
926 | WRITE_PROC_FIRST_MB | WRITE_PROC_WMB | |
927 | | WRITE_PROC_FIRST_READ_GP, | |
928 | WRITE_PROC_FIRST_WRITE_GP) -> | |
929 | ooo_mem(i); | |
930 | WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); | |
931 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); | |
932 | ||
933 | :: CONSUME_TOKENS(proc_urcu_writer, | |
934 | //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ | |
935 | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ | |
936 | WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> | |
937 | ooo_mem(i); | |
938 | //smp_mb(i); /* TEST */ | |
939 | /* ONLY WAITING FOR READER 0 */ | |
940 | tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); | |
941 | #ifndef SINGLE_FLIP | |
942 | /* In normal execution, we are always starting by | |
943 | * waiting for the even parity. | |
944 | */ | |
945 | cur_gp_val = RCU_GP_CTR_BIT; | |
946 | #endif | |
947 | if | |
948 | :: (tmp2 & RCU_GP_CTR_NEST_MASK) | |
949 | && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> | |
950 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); | |
951 | :: else -> | |
952 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); | |
953 | fi; | |
954 | ||
955 | :: CONSUME_TOKENS(proc_urcu_writer, | |
956 | //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ | |
957 | WRITE_PROC_FIRST_WRITE_GP | |
958 | | WRITE_PROC_FIRST_READ_GP | |
959 | | WRITE_PROC_FIRST_WAIT_LOOP | |
960 | | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR | |
961 | | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ | |
962 | 0) -> | |
963 | #ifndef GEN_ERROR_WRITER_PROGRESS | |
964 | goto smp_mb_send2; | |
965 | smp_mb_send2_end: | |
966 | /* The memory barrier will invalidate the | |
967 | * second read done as prefetching. Note that all | |
968 | * instructions with side-effects depending on | |
969 | * WRITE_PROC_SECOND_READ_GP should also depend on | |
970 | * completion of this busy-waiting loop. */ | |
971 | CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); | |
972 | #else | |
973 | ooo_mem(i); | |
974 | #endif | |
975 | /* This instruction loops to WRITE_PROC_FIRST_WAIT */ | |
976 | CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); | |
977 | ||
978 | /* second flip */ | |
979 | :: CONSUME_TOKENS(proc_urcu_writer, | |
980 | //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ | |
981 | WRITE_PROC_FIRST_WRITE_GP | |
982 | | WRITE_PROC_FIRST_READ_GP | |
983 | | WRITE_PROC_FIRST_MB, | |
984 | WRITE_PROC_SECOND_READ_GP) -> | |
985 | ooo_mem(i); | |
986 | //smp_mb(i); /* TEST */ | |
987 | tmpa = READ_CACHED_VAR(urcu_gp_ctr); | |
988 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); | |
989 | :: CONSUME_TOKENS(proc_urcu_writer, | |
990 | WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this | |
991 | * instruction has globally observable | |
992 | * side-effects. | |
993 | */ | |
994 | | WRITE_PROC_FIRST_MB | |
995 | | WRITE_PROC_WMB | |
996 | | WRITE_PROC_FIRST_READ_GP | |
997 | | WRITE_PROC_FIRST_WRITE_GP | |
998 | | WRITE_PROC_SECOND_READ_GP, | |
999 | WRITE_PROC_SECOND_WRITE_GP) -> | |
1000 | ooo_mem(i); | |
1001 | WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); | |
1002 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); | |
1003 | ||
1004 | :: CONSUME_TOKENS(proc_urcu_writer, | |
1005 | //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ | |
1006 | WRITE_PROC_FIRST_WAIT | |
1007 | | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ | |
1008 | WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> | |
1009 | ooo_mem(i); | |
1010 | //smp_mb(i); /* TEST */ | |
1011 | /* ONLY WAITING FOR READER 0 */ | |
1012 | tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); | |
1013 | if | |
1014 | :: (tmp2 & RCU_GP_CTR_NEST_MASK) | |
1015 | && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> | |
1016 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); | |
1017 | :: else -> | |
1018 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); | |
1019 | fi; | |
1020 | ||
1021 | :: CONSUME_TOKENS(proc_urcu_writer, | |
1022 | //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ | |
1023 | WRITE_PROC_SECOND_WRITE_GP | |
1024 | | WRITE_PROC_FIRST_WRITE_GP | |
1025 | | WRITE_PROC_SECOND_READ_GP | |
1026 | | WRITE_PROC_FIRST_READ_GP | |
1027 | | WRITE_PROC_SECOND_WAIT_LOOP | |
1028 | | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR | |
1029 | | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ | |
1030 | 0) -> | |
1031 | #ifndef GEN_ERROR_WRITER_PROGRESS | |
1032 | goto smp_mb_send3; | |
1033 | smp_mb_send3_end: | |
1034 | #else | |
1035 | ooo_mem(i); | |
1036 | #endif | |
1037 | /* This instruction loops to WRITE_PROC_SECOND_WAIT */ | |
1038 | CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); | |
1039 | ||
1040 | ||
1041 | :: CONSUME_TOKENS(proc_urcu_writer, | |
1042 | WRITE_PROC_FIRST_WAIT | |
1043 | | WRITE_PROC_SECOND_WAIT | |
1044 | | WRITE_PROC_FIRST_READ_GP | |
1045 | | WRITE_PROC_SECOND_READ_GP | |
1046 | | WRITE_PROC_FIRST_WRITE_GP | |
1047 | | WRITE_PROC_SECOND_WRITE_GP | |
1048 | | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR | |
1049 | | WRITE_PROC_FIRST_MB, | |
1050 | WRITE_PROC_SECOND_MB) -> | |
1051 | goto smp_mb_send4; | |
1052 | smp_mb_send4_end: | |
1053 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); | |
1054 | ||
1055 | :: CONSUME_TOKENS(proc_urcu_writer, | |
1056 | WRITE_XCHG_PTR | |
1057 | | WRITE_PROC_FIRST_WAIT | |
1058 | | WRITE_PROC_SECOND_WAIT | |
1059 | | WRITE_PROC_WMB /* No dependency on | |
1060 | * WRITE_DATA because we | |
1061 | * write to a | |
1062 | * different location. */ | |
1063 | | WRITE_PROC_SECOND_MB | |
1064 | | WRITE_PROC_FIRST_MB, | |
1065 | WRITE_FREE) -> | |
1066 | WRITE_CACHED_VAR(rcu_data[old_data], POISON); | |
1067 | PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); | |
1068 | ||
1069 | :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> | |
1070 | CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); | |
1071 | break; | |
1072 | fi; | |
1073 | } | |
1074 | od; | |
1075 | /* | |
1076 | * Note : Promela model adds implicit serialization of the | |
1077 | * WRITE_FREE instruction. Normally, it would be permitted to | |
1078 | * spill on the next loop execution. Given the validation we do | |
1079 | * checks for the data entry read to be poisoned, it's ok if | |
1080 | * we do not check "late arriving" memory poisoning. | |
1081 | */ | |
1082 | :: else -> break; | |
1083 | od; | |
1084 | /* | |
1085 | * Given the reader loops infinitely, let the writer also busy-loop | |
1086 | * with progress here so, with weak fairness, we can test the | |
1087 | * writer's progress. | |
1088 | */ | |
1089 | end_writer: | |
1090 | do | |
1091 | :: 1 -> | |
1092 | #ifdef WRITER_PROGRESS | |
1093 | progress_writer2: | |
1094 | #endif | |
1095 | #ifdef READER_PROGRESS | |
1096 | /* | |
1097 | * Make sure we don't block the reader's progress. | |
1098 | */ | |
1099 | smp_mb_send(i, j, 5); | |
1100 | #endif | |
1101 | skip; | |
1102 | od; | |
1103 | ||
1104 | /* Non-atomic parts of the loop */ | |
1105 | goto end; | |
1106 | smp_mb_send1: | |
1107 | smp_mb_send(i, j, 1); | |
1108 | goto smp_mb_send1_end; | |
1109 | #ifndef GEN_ERROR_WRITER_PROGRESS | |
1110 | smp_mb_send2: | |
1111 | smp_mb_send(i, j, 2); | |
1112 | goto smp_mb_send2_end; | |
1113 | smp_mb_send3: | |
1114 | smp_mb_send(i, j, 3); | |
1115 | goto smp_mb_send3_end; | |
1116 | #endif | |
1117 | smp_mb_send4: | |
1118 | smp_mb_send(i, j, 4); | |
1119 | goto smp_mb_send4_end; | |
1120 | end: | |
1121 | skip; | |
1122 | } | |
1123 | ||
1124 | /* no name clash please */ | |
1125 | #undef proc_urcu_writer | |
1126 | ||
1127 | ||
1128 | /* Leave after the readers and writers so the pid count is ok. */ | |
1129 | init { | |
1130 | byte i, j; | |
1131 | ||
1132 | atomic { | |
1133 | INIT_CACHED_VAR(urcu_gp_ctr, 1); | |
1134 | INIT_CACHED_VAR(rcu_ptr, 0); | |
1135 | ||
1136 | i = 0; | |
1137 | do | |
1138 | :: i < NR_READERS -> | |
1139 | INIT_CACHED_VAR(urcu_active_readers[i], 0); | |
1140 | ptr_read_first[i] = 1; | |
1141 | data_read_first[i] = WINE; | |
1142 | i++; | |
1143 | :: i >= NR_READERS -> break | |
1144 | od; | |
1145 | INIT_CACHED_VAR(rcu_data[0], WINE); | |
1146 | i = 1; | |
1147 | do | |
1148 | :: i < SLAB_SIZE -> | |
1149 | INIT_CACHED_VAR(rcu_data[i], POISON); | |
1150 | i++ | |
1151 | :: i >= SLAB_SIZE -> break | |
1152 | od; | |
1153 | ||
1154 | init_done = 1; | |
1155 | } | |
1156 | } |