X-Git-Url: https://git.lttng.org/?p=urcu.git;a=blobdiff_plain;f=urcu%2Fcompiler.h;h=64d12d344a26a1fdca56fd0b1201437241b9967a;hp=fb8b8293ca132f683f9639c3a2502e934d17c326;hb=85b577030e0dd244ed2d42aa5196a088e1e64dbb;hpb=453629a9317adef5b96c3d55e4dcd98db680997a diff --git a/urcu/compiler.h b/urcu/compiler.h index fb8b829..64d12d3 100644 --- a/urcu/compiler.h +++ b/urcu/compiler.h @@ -23,21 +23,21 @@ #define likely(x) __builtin_expect(!!(x), 1) #define unlikely(x) __builtin_expect(!!(x), 0) -#define barrier() asm volatile("" : : : "memory") +#define cmm_barrier() asm volatile("" : : : "memory") /* * Instruct the compiler to perform only a single access to a variable * (prohibits merging and refetching). The compiler is also forbidden to reorder - * successive instances of ACCESS_ONCE(), but only when the compiler is aware of + * successive instances of CMM_ACCESS_ONCE(), but only when the compiler is aware of * particular ordering. Compiler ordering can be ensured, for example, by - * putting two ACCESS_ONCE() in separate C statements. + * putting two CMM_ACCESS_ONCE() in separate C statements. * * This macro does absolutely -nothing- to prevent the CPU from reordering, * merging, or refetching absolutely anything at any time. Its main intended * use is to mediate communication between process-level code and irq/NMI * handlers, all running on the same CPU. */ -#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) +#define CMM_ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) #ifndef max #define max(a,b) ((a)>(b)?(a):(b)) @@ -48,14 +48,14 @@ #endif #if defined(__SIZEOF_LONG__) -#define BITS_PER_LONG (__SIZEOF_LONG__ * 8) +#define CAA_BITS_PER_LONG (__SIZEOF_LONG__ * 8) #elif defined(_LP64) -#define BITS_PER_LONG 64 +#define CAA_BITS_PER_LONG 64 #else -#define BITS_PER_LONG 32 +#define CAA_BITS_PER_LONG 32 #endif -#define container_of(ptr, type, member) \ +#define caa_container_of(ptr, type, member) \ ({ \ const typeof(((type *)NULL)->member) * __ptr = (ptr); \ (type *)((char *)__ptr - offsetof(type, member)); \