X-Git-Url: https://git.lttng.org/?p=urcu.git;a=blobdiff_plain;f=tests%2Ftest_qsbr.c;h=cf2fec2a8cbc8ce19f366ce669412bf3842ef5f5;hp=43797716bcaff18fc1a8c9d6eb2fffe2bc3d6e95;hb=ec4e58a3aba2084440012f8ccac3a31eb6101183;hpb=2f873279bc92fac32e6549d6eb72f3197c7048ac diff --git a/tests/test_qsbr.c b/tests/test_qsbr.c index 4379771..cf2fec2 100644 --- a/tests/test_qsbr.c +++ b/tests/test_qsbr.c @@ -33,7 +33,7 @@ #include #include -#include "../arch.h" +#include /* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ #define CACHE_LINE_SIZE 4096 @@ -61,7 +61,7 @@ static inline pid_t gettid(void) #else #define debug_yield_read() #endif -#include "../urcu-qsbr.h" +#include "urcu-qsbr.h" struct test_array { int a;