urcu.h

   1 #ifndef _URCU_H
   2 #define _URCU_H
   3
   4 /*
   5  * urcu.h
   6  *
   7  * Userspace RCU header
   8  *
   9  * Copyright February 2009 - Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
  10  *
  11  * Credits for Paul e. McKenney <paulmck@linux.vnet.ibm.com>
  12  * for inspiration coming from the Linux kernel RCU and rcu-preempt.
  13  *
  14  * The barrier, mb, rmb, wmb, atomic_inc, smp_read_barrier_depends, ACCESS_ONCE
  15  * and rcu_dereference primitives come from the Linux kernel.
  16  *
  17  * Distributed under GPLv2
  18  */
  19
  20 #include <stdlib.h>
  21 #include <pthread.h>
  22
  23 /* The "volatile" is due to gcc bugs */
  24 #define barrier() __asm__ __volatile__("": : :"memory")
  25
  26 #define likely(x)       __builtin_expect(!!(x), 1)
  27 #define unlikely(x)     __builtin_expect(!!(x), 0)
  28
  29 /* x86 32/64 specific */
  30 #define mb()    asm volatile("mfence":::"memory")
  31 #define rmb()   asm volatile("lfence":::"memory")
  32 #define wmb()   asm volatile("sfence" ::: "memory")
  33
  34 /* Assume SMP machine, given we don't have this information */
  35 #define CONFIG_SMP 1
  36
  37 #ifdef CONFIG_SMP
  38 #define smp_mb()        mb()
  39 #define smp_rmb()       rmb()
  40 #define smp_wmb()       wmb()
  41 #else
  42 #define smp_mb()        barrier()
  43 #define smp_rmb()       barrier()
  44 #define smp_wmb()       barrier()
  45 #endif
  46
  47 static inline void atomic_inc(int *v)
  48 {
  49         asm volatile("lock; incl %0"
  50                      : "+m" (*v));
  51 }
  52
  53 #define xchg(ptr, v)                                                    \
  54         ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
  55
  56 struct __xchg_dummy {
  57         unsigned long a[100];
  58 };
  59 #define __xg(x) ((struct __xchg_dummy *)(x))
  60
  61 /*
  62  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
  63  * Note 2: xchg has side effect, so that attribute volatile is necessary,
  64  *        but generally the primitive is invalid, *ptr is output argument. --ANK
  65  */
  66 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
  67                                    int size)
  68 {
  69         switch (size) {
  70         case 1:
  71                 asm volatile("xchgb %b0,%1"
  72                              : "=q" (x)
  73                              : "m" (*__xg(ptr)), "0" (x)
  74                              : "memory");
  75                 break;
  76         case 2:
  77                 asm volatile("xchgw %w0,%1"
  78                              : "=r" (x)
  79                              : "m" (*__xg(ptr)), "0" (x)
  80                              : "memory");
  81                 break;
  82         case 4:
  83                 asm volatile("xchgl %k0,%1"
  84                              : "=r" (x)
  85                              : "m" (*__xg(ptr)), "0" (x)
  86                              : "memory");
  87                 break;
  88         case 8:
  89                 asm volatile("xchgq %0,%1"
  90                              : "=r" (x)
  91                              : "m" (*__xg(ptr)), "0" (x)
  92                              : "memory");
  93                 break;
  94         }
  95         return x;
  96 }
  97
  98 /* Nop everywhere except on alpha. */
  99 #define smp_read_barrier_depends()
 100
 101 /*
 102  * Prevent the compiler from merging or refetching accesses.  The compiler
 103  * is also forbidden from reordering successive instances of ACCESS_ONCE(),
 104  * but only when the compiler is aware of some particular ordering.  One way
 105  * to make the compiler aware of ordering is to put the two invocations of
 106  * ACCESS_ONCE() in different C statements.
 107  *
 108  * This macro does absolutely -nothing- to prevent the CPU from reordering,
 109  * merging, or refetching absolutely anything at any time.  Its main intended
 110  * use is to mediate communication between process-level code and irq/NMI
 111  * handlers, all running on the same CPU.
 112  */
 113 #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
 114
 115 /**
 116  * rcu_dereference - fetch an RCU-protected pointer in an
 117  * RCU read-side critical section.  This pointer may later
 118  * be safely dereferenced.
 119  *
 120  * Inserts memory barriers on architectures that require them
 121  * (currently only the Alpha), and, more importantly, documents
 122  * exactly which pointers are protected by RCU.
 123  */
 124
 125 #define rcu_dereference(p)     ({ \
 126                                 typeof(p) _________p1 = ACCESS_ONCE(p); \
 127                                 smp_read_barrier_depends(); \
 128                                 (_________p1); \
 129                                 })
 130
 131 #define SIGURCU SIGUSR1
 132
 133 #ifdef DEBUG_YIELD
 134 #include <sched.h>
 135 #include <time.h>
 136 #include <pthread.h>
 137 #include <unistd.h>
 138
 139 #define YIELD_READ      (1 << 0)
 140 #define YIELD_WRITE     (1 << 1)
 141
 142 /* Updates without DEBUG_FULL_MB are much slower. Account this in the delay */
 143 #ifdef DEBUG_FULL_MB
 144 /* maximum sleep delay, in us */
 145 #define MAX_SLEEP 50
 146 #else
 147 #define MAX_SLEEP 30000
 148 #endif
 149
 150 extern unsigned int yield_active;
 151 extern unsigned int __thread rand_yield;
 152
 153 static inline void debug_yield_read(void)
 154 {
 155         if (yield_active & YIELD_READ)
 156                 if (rand_r(&rand_yield) & 0x1)
 157                         usleep(rand_r(&rand_yield) % MAX_SLEEP);
 158 }
 159
 160 static inline void debug_yield_write(void)
 161 {
 162         if (yield_active & YIELD_WRITE)
 163                 if (rand_r(&rand_yield) & 0x1)
 164                         usleep(rand_r(&rand_yield) % MAX_SLEEP);
 165 }
 166
 167 static inline void debug_yield_init(void)
 168 {
 169         rand_yield = time(NULL) ^ pthread_self();
 170 }
 171 #else
 172 static inline void debug_yield_read(void)
 173 {
 174 }
 175
 176 static inline void debug_yield_write(void)
 177 {
 178 }
 179
 180 static inline void debug_yield_init(void)
 181 {
 182
 183 }
 184 #endif
 185
 186 #ifdef DEBUG_FULL_MB
 187 static inline void read_barrier()
 188 {
 189         smp_mb();
 190 }
 191 #else
 192 static inline void read_barrier()
 193 {
 194         barrier();
 195 }
 196 #endif
 197
 198 /*
 199  * The trick here is that RCU_GP_CTR_BIT must be a multiple of 8 so we can use a
 200  * full 8-bits, 16-bits or 32-bits bitmask for the lower order bits.
 201  */
 202 #define RCU_GP_COUNT            (1UL << 0)
 203 /* Use the amount of bits equal to half of the architecture long size */
 204 #define RCU_GP_CTR_BIT          (1UL << (sizeof(long) << 2))
 205 #define RCU_GP_CTR_NEST_MASK    (RCU_GP_CTR_BIT - 1)
 206
 207 /*
 208  * Global quiescent period counter with low-order bits unused.
 209  * Using a int rather than a char to eliminate false register dependencies
 210  * causing stalls on some architectures.
 211  */
 212 extern long urcu_gp_ctr;
 213
 214 extern long __thread urcu_active_readers;
 215
 216 static inline int rcu_old_gp_ongoing(long *value)
 217 {
 218         long v;
 219
 220         if (value == NULL)
 221                 return 0;
 222         /*
 223          * Make sure both tests below are done on the same version of *value
 224          * to insure consistency.
 225          */
 226         v = ACCESS_ONCE(*value);
 227         return (v & RCU_GP_CTR_NEST_MASK) &&
 228                  ((v ^ urcu_gp_ctr) & RCU_GP_CTR_BIT);
 229 }
 230
 231 static inline void rcu_read_lock(void)
 232 {
 233         long tmp;
 234
 235         tmp = urcu_active_readers;
 236         /* urcu_gp_ctr = RCU_GP_COUNT | (~RCU_GP_CTR_BIT or RCU_GP_CTR_BIT) */
 237         if (likely(!(tmp & RCU_GP_CTR_NEST_MASK)))
 238                 urcu_active_readers = urcu_gp_ctr;
 239         else
 240                 urcu_active_readers = tmp + RCU_GP_COUNT;
 241         /*
 242          * Increment active readers count before accessing the pointer.
 243          * See force_mb_all_threads().
 244          */
 245         read_barrier();
 246 }
 247
 248 static inline void rcu_read_unlock(void)
 249 {
 250         read_barrier();
 251         /*
 252          * Finish using rcu before decrementing the pointer.
 253          * See force_mb_all_threads().
 254          */
 255         urcu_active_readers -= RCU_GP_COUNT;
 256 }
 257
 258 /**
 259  * rcu_assign_pointer - assign (publicize) a pointer to a newly
 260  * initialized structure that will be dereferenced by RCU read-side
 261  * critical sections.  Returns the value assigned.
 262  *
 263  * Inserts memory barriers on architectures that require them
 264  * (pretty much all of them other than x86), and also prevents
 265  * the compiler from reordering the code that initializes the
 266  * structure after the pointer assignment.  More importantly, this
 267  * call documents which pointers will be dereferenced by RCU read-side
 268  * code.
 269  */
 270
 271 #define rcu_assign_pointer(p, v) \
 272         ({ \
 273                 if (!__builtin_constant_p(v) || \
 274                     ((v) != NULL)) \
 275                         wmb(); \
 276                 (p) = (v); \
 277         })
 278
 279 #define rcu_xchg_pointer(p, v) \
 280         ({ \
 281                 if (!__builtin_constant_p(v) || \
 282                     ((v) != NULL)) \
 283                         wmb(); \
 284                 xchg(p, v); \
 285         })
 286
 287 extern void synchronize_rcu(void);
 288
 289 /*
 290  * Exchanges the pointer and waits for quiescent state.
 291  * The pointer returned can be freed.
 292  */
 293 #define urcu_publish_content(p, v) \
 294         ({ \
 295                 void *oldptr; \
 296                 oldptr = rcu_xchg_pointer(p, v); \
 297                 synchronize_rcu(); \
 298                 oldptr; \
 299         })
 300
 301 /*
 302  * Reader thread registration.
 303  */
 304 extern void urcu_register_thread(void);
 305 extern void urcu_unregister_thread(void);
 306
 307 #endif /* _URCU_H */