Update formal model from local copy
[urcu.git] / formal-model / urcu-controldataflow-intel-ipi-compress / urcu_progress_writer.spin.input
1 #define WRITER_PROGRESS
2
3 // Poison value for freed memory
4 #define POISON 1
5 // Memory with correct data
6 #define WINE 0
7 #define SLAB_SIZE 2
8
9 #define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON)
10
11 #define RCU_GP_CTR_BIT (1 << 7)
12 #define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1)
13
14 //disabled
15 #define REMOTE_BARRIERS
16
17 //#define ARCH_ALPHA
18 #define ARCH_INTEL
19 //#define ARCH_POWERPC
20 /*
21 * mem.spin: Promela code to validate memory barriers with OOO memory
22 * and out-of-order instruction scheduling.
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
37 *
38 * Copyright (c) 2009 Mathieu Desnoyers
39 */
40
41 /* Promela validation variables. */
42
43 /* specific defines "included" here */
44 /* DEFINES file "included" here */
45
46 #define NR_READERS 1
47 #define NR_WRITERS 1
48
49 #define NR_PROCS 2
50
51 #define get_pid() (_pid)
52
53 #define get_readerid() (get_pid())
54
55 /*
56 * Produced process control and data flow. Updated after each instruction to
57 * show which variables are ready. Using one-hot bit encoding per variable to
58 * save state space. Used as triggers to execute the instructions having those
59 * variables as input. Leaving bits active to inhibit instruction execution.
60 * Scheme used to make instruction disabling and automatic dependency fall-back
61 * automatic.
62 */
63
64 #define CONSUME_TOKENS(state, bits, notbits) \
65 ((!(state & (notbits))) && (state & (bits)) == (bits))
66
67 #define PRODUCE_TOKENS(state, bits) \
68 state = state | (bits);
69
70 #define CLEAR_TOKENS(state, bits) \
71 state = state & ~(bits)
72
73 /*
74 * Types of dependency :
75 *
76 * Data dependency
77 *
78 * - True dependency, Read-after-Write (RAW)
79 *
80 * This type of dependency happens when a statement depends on the result of a
81 * previous statement. This applies to any statement which needs to read a
82 * variable written by a preceding statement.
83 *
84 * - False dependency, Write-after-Read (WAR)
85 *
86 * Typically, variable renaming can ensure that this dependency goes away.
87 * However, if the statements must read and then write from/to the same variable
88 * in the OOO memory model, renaming may be impossible, and therefore this
89 * causes a WAR dependency.
90 *
91 * - Output dependency, Write-after-Write (WAW)
92 *
93 * Two writes to the same variable in subsequent statements. Variable renaming
94 * can ensure this is not needed, but can be required when writing multiple
95 * times to the same OOO mem model variable.
96 *
97 * Control dependency
98 *
99 * Execution of a given instruction depends on a previous instruction evaluating
100 * in a way that allows its execution. E.g. : branches.
101 *
102 * Useful considerations for joining dependencies after branch
103 *
104 * - Pre-dominance
105 *
106 * "We say box i dominates box j if every path (leading from input to output
107 * through the diagram) which passes through box j must also pass through box
108 * i. Thus box i dominates box j if box j is subordinate to box i in the
109 * program."
110 *
111 * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf
112 * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc)
113 *
114 * - Post-dominance
115 *
116 * Just as pre-dominance, but with arcs of the data flow inverted, and input vs
117 * output exchanged. Therefore, i post-dominating j ensures that every path
118 * passing by j will pass by i before reaching the output.
119 *
120 * Prefetch and speculative execution
121 *
122 * If an instruction depends on the result of a previous branch, but it does not
123 * have side-effects, it can be executed before the branch result is known.
124 * however, it must be restarted if a core-synchronizing instruction is issued.
125 * Note that instructions which depend on the speculative instruction result
126 * but that have side-effects must depend on the branch completion in addition
127 * to the speculatively executed instruction.
128 *
129 * Other considerations
130 *
131 * Note about "volatile" keyword dependency : The compiler will order volatile
132 * accesses so they appear in the right order on a given CPU. They can be
133 * reordered by the CPU instruction scheduling. This therefore cannot be
134 * considered as a depencency.
135 *
136 * References :
137 *
138 * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan
139 * Kaufmann. ISBN 1-55860-698-X.
140 * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern
141 * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN
142 * 1-55860-286-0.
143 * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation.
144 * Morgan Kaufmann. ISBN 1-55860-320-4.
145 */
146
147 /*
148 * Note about loops and nested calls
149 *
150 * To keep this model simple, loops expressed in the framework will behave as if
151 * there was a core synchronizing instruction between loops. To see the effect
152 * of loop unrolling, manually unrolling loops is required. Note that if loops
153 * end or start with a core synchronizing instruction, the model is appropriate.
154 * Nested calls are not supported.
155 */
156
157 /*
158 * Only Alpha has out-of-order cache bank loads. Other architectures (intel,
159 * powerpc, arm) ensure that dependent reads won't be reordered. c.f.
160 * http://www.linuxjournal.com/article/8212)
161 */
162 #ifdef ARCH_ALPHA
163 #define HAVE_OOO_CACHE_READ
164 #endif
165
166 /*
167 * Each process have its own data in cache. Caches are randomly updated.
168 * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces
169 * both.
170 */
171
172 typedef per_proc_byte {
173 byte val[NR_PROCS];
174 };
175
176 typedef per_proc_bit {
177 bit val[NR_PROCS];
178 };
179
180 /* Bitfield has a maximum of 8 procs */
181 typedef per_proc_bitfield {
182 byte bitfield;
183 };
184
185 #define DECLARE_CACHED_VAR(type, x) \
186 type mem_##x;
187
188 #define DECLARE_PROC_CACHED_VAR(type, x)\
189 type cached_##x; \
190 bit cache_dirty_##x;
191
192 #define INIT_CACHED_VAR(x, v) \
193 mem_##x = v;
194
195 #define INIT_PROC_CACHED_VAR(x, v) \
196 cache_dirty_##x = 0; \
197 cached_##x = v;
198
199 #define IS_CACHE_DIRTY(x, id) (cache_dirty_##x)
200
201 #define READ_CACHED_VAR(x) (cached_##x)
202
203 #define WRITE_CACHED_VAR(x, v) \
204 atomic { \
205 cached_##x = v; \
206 cache_dirty_##x = 1; \
207 }
208
209 #define CACHE_WRITE_TO_MEM(x, id) \
210 if \
211 :: IS_CACHE_DIRTY(x, id) -> \
212 mem_##x = cached_##x; \
213 cache_dirty_##x = 0; \
214 :: else -> \
215 skip \
216 fi;
217
218 #define CACHE_READ_FROM_MEM(x, id) \
219 if \
220 :: !IS_CACHE_DIRTY(x, id) -> \
221 cached_##x = mem_##x; \
222 :: else -> \
223 skip \
224 fi;
225
226 /*
227 * May update other caches if cache is dirty, or not.
228 */
229 #define RANDOM_CACHE_WRITE_TO_MEM(x, id)\
230 if \
231 :: 1 -> CACHE_WRITE_TO_MEM(x, id); \
232 :: 1 -> skip \
233 fi;
234
235 #define RANDOM_CACHE_READ_FROM_MEM(x, id)\
236 if \
237 :: 1 -> CACHE_READ_FROM_MEM(x, id); \
238 :: 1 -> skip \
239 fi;
240
241 /* Must consume all prior read tokens. All subsequent reads depend on it. */
242 inline smp_rmb(i)
243 {
244 atomic {
245 CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid());
246 i = 0;
247 do
248 :: i < NR_READERS ->
249 CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid());
250 i++
251 :: i >= NR_READERS -> break
252 od;
253 CACHE_READ_FROM_MEM(rcu_ptr, get_pid());
254 i = 0;
255 do
256 :: i < SLAB_SIZE ->
257 CACHE_READ_FROM_MEM(rcu_data[i], get_pid());
258 i++
259 :: i >= SLAB_SIZE -> break
260 od;
261 }
262 }
263
264 /* Must consume all prior write tokens. All subsequent writes depend on it. */
265 inline smp_wmb(i)
266 {
267 atomic {
268 CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid());
269 i = 0;
270 do
271 :: i < NR_READERS ->
272 CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid());
273 i++
274 :: i >= NR_READERS -> break
275 od;
276 CACHE_WRITE_TO_MEM(rcu_ptr, get_pid());
277 i = 0;
278 do
279 :: i < SLAB_SIZE ->
280 CACHE_WRITE_TO_MEM(rcu_data[i], get_pid());
281 i++
282 :: i >= SLAB_SIZE -> break
283 od;
284 }
285 }
286
287 /* Synchronization point. Must consume all prior read and write tokens. All
288 * subsequent reads and writes depend on it. */
289 inline smp_mb(i)
290 {
291 atomic {
292 smp_wmb(i);
293 smp_rmb(i);
294 }
295 }
296
297 #ifdef REMOTE_BARRIERS
298
299 bit reader_barrier[NR_READERS];
300
301 /*
302 * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode
303 * because they would add unexisting core synchronization and would therefore
304 * create an incomplete model.
305 * Therefore, we model the read-side memory barriers by completely disabling the
306 * memory barriers and their dependencies from the read-side. One at a time
307 * (different verification runs), we make a different instruction listen for
308 * signals.
309 */
310
311 #define smp_mb_reader(i, j)
312
313 /*
314 * Service 0, 1 or many barrier requests.
315 */
316 inline smp_mb_recv(i, j)
317 {
318 do
319 :: (reader_barrier[get_readerid()] == 1) ->
320 /*
321 * We choose to ignore cycles caused by writer busy-looping,
322 * waiting for the reader, sending barrier requests, and the
323 * reader always services them without continuing execution.
324 */
325 progress_ignoring_mb1:
326 smp_mb(i);
327 reader_barrier[get_readerid()] = 0;
328 :: 1 ->
329 /*
330 * We choose to ignore writer's non-progress caused by the
331 * reader ignoring the writer's mb() requests.
332 */
333 progress_ignoring_mb2:
334 break;
335 od;
336 }
337
338 #define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid:
339
340 #define smp_mb_send(i, j, progressid) \
341 { \
342 smp_mb(i); \
343 i = 0; \
344 do \
345 :: i < NR_READERS -> \
346 reader_barrier[i] = 1; \
347 /* \
348 * Busy-looping waiting for reader barrier handling is of little\
349 * interest, given the reader has the ability to totally ignore \
350 * barrier requests. \
351 */ \
352 do \
353 :: (reader_barrier[i] == 1) -> \
354 PROGRESS_LABEL(progressid) \
355 skip; \
356 :: (reader_barrier[i] == 0) -> break; \
357 od; \
358 i++; \
359 :: i >= NR_READERS -> \
360 break \
361 od; \
362 smp_mb(i); \
363 }
364
365 #else
366
367 #define smp_mb_send(i, j, progressid) smp_mb(i)
368 #define smp_mb_reader(i, j) smp_mb(i)
369 #define smp_mb_recv(i, j)
370
371 #endif
372
373 /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */
374 DECLARE_CACHED_VAR(byte, urcu_gp_ctr);
375 /* Note ! currently only one reader */
376 DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]);
377 /* RCU data */
378 DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]);
379
380 /* RCU pointer */
381 #if (SLAB_SIZE == 2)
382 DECLARE_CACHED_VAR(bit, rcu_ptr);
383 bit ptr_read_first[NR_READERS];
384 bit ptr_read_second[NR_READERS];
385 #else
386 DECLARE_CACHED_VAR(byte, rcu_ptr);
387 byte ptr_read_first[NR_READERS];
388 byte ptr_read_second[NR_READERS];
389 #endif
390
391 bit data_read_first[NR_READERS];
392 bit data_read_second[NR_READERS];
393
394 bit init_done = 0;
395
396 inline wait_init_done()
397 {
398 do
399 :: init_done == 0 -> skip;
400 :: else -> break;
401 od;
402 }
403
404 inline ooo_mem(i)
405 {
406 atomic {
407 RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid());
408 i = 0;
409 do
410 :: i < NR_READERS ->
411 RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i],
412 get_pid());
413 i++
414 :: i >= NR_READERS -> break
415 od;
416 RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid());
417 i = 0;
418 do
419 :: i < SLAB_SIZE ->
420 RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid());
421 i++
422 :: i >= SLAB_SIZE -> break
423 od;
424 #ifdef HAVE_OOO_CACHE_READ
425 RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid());
426 i = 0;
427 do
428 :: i < NR_READERS ->
429 RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i],
430 get_pid());
431 i++
432 :: i >= NR_READERS -> break
433 od;
434 RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid());
435 i = 0;
436 do
437 :: i < SLAB_SIZE ->
438 RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid());
439 i++
440 :: i >= SLAB_SIZE -> break
441 od;
442 #else
443 smp_rmb(i);
444 #endif /* HAVE_OOO_CACHE_READ */
445 }
446 }
447
448 /*
449 * Bit encoding, urcu_reader :
450 */
451
452 int _proc_urcu_reader;
453 #define proc_urcu_reader _proc_urcu_reader
454
455 /* Body of PROCEDURE_READ_LOCK */
456 #define READ_PROD_A_READ (1 << 0)
457 #define READ_PROD_B_IF_TRUE (1 << 1)
458 #define READ_PROD_B_IF_FALSE (1 << 2)
459 #define READ_PROD_C_IF_TRUE_READ (1 << 3)
460
461 #define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \
462 :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \
463 ooo_mem(i); \
464 tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \
465 PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \
466 :: CONSUME_TOKENS(proc_urcu_reader, \
467 READ_PROD_A_READ << base, /* RAW, pre-dominant */ \
468 (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \
469 if \
470 :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \
471 PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \
472 :: else -> \
473 PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \
474 fi; \
475 /* IF TRUE */ \
476 :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \
477 READ_PROD_C_IF_TRUE_READ << base) -> \
478 ooo_mem(i); \
479 tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \
480 PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \
481 :: CONSUME_TOKENS(proc_urcu_reader, \
482 (READ_PROD_B_IF_TRUE \
483 | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \
484 | READ_PROD_A_READ) << base, /* WAR */ \
485 producetoken) -> \
486 ooo_mem(i); \
487 WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \
488 PRODUCE_TOKENS(proc_urcu_reader, producetoken); \
489 /* IF_MERGE implies \
490 * post-dominance */ \
491 /* ELSE */ \
492 :: CONSUME_TOKENS(proc_urcu_reader, \
493 (READ_PROD_B_IF_FALSE /* pre-dominant */ \
494 | READ_PROD_A_READ) << base, /* WAR */ \
495 producetoken) -> \
496 ooo_mem(i); \
497 WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \
498 tmp + 1); \
499 PRODUCE_TOKENS(proc_urcu_reader, producetoken); \
500 /* IF_MERGE implies \
501 * post-dominance */ \
502 /* ENDIF */ \
503 skip
504
505 /* Body of PROCEDURE_READ_LOCK */
506 #define READ_PROC_READ_UNLOCK (1 << 0)
507
508 #define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \
509 :: CONSUME_TOKENS(proc_urcu_reader, \
510 consumetoken, \
511 READ_PROC_READ_UNLOCK << base) -> \
512 ooo_mem(i); \
513 tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \
514 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \
515 :: CONSUME_TOKENS(proc_urcu_reader, \
516 consumetoken \
517 | (READ_PROC_READ_UNLOCK << base), /* WAR */ \
518 producetoken) -> \
519 ooo_mem(i); \
520 WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \
521 PRODUCE_TOKENS(proc_urcu_reader, producetoken); \
522 skip
523
524
525 #define READ_PROD_NONE (1 << 0)
526
527 /* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */
528 #define READ_LOCK_BASE 1
529 #define READ_LOCK_OUT (1 << 5)
530
531 #define READ_PROC_FIRST_MB (1 << 6)
532
533 /* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */
534 #define READ_LOCK_NESTED_BASE 7
535 #define READ_LOCK_NESTED_OUT (1 << 11)
536
537 #define READ_PROC_READ_GEN (1 << 12)
538 #define READ_PROC_ACCESS_GEN (1 << 13)
539
540 /* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */
541 #define READ_UNLOCK_NESTED_BASE 14
542 #define READ_UNLOCK_NESTED_OUT (1 << 15)
543
544 #define READ_PROC_SECOND_MB (1 << 16)
545
546 /* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */
547 #define READ_UNLOCK_BASE 17
548 #define READ_UNLOCK_OUT (1 << 18)
549
550 /* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */
551 #define READ_LOCK_UNROLL_BASE 19
552 #define READ_LOCK_OUT_UNROLL (1 << 23)
553
554 #define READ_PROC_THIRD_MB (1 << 24)
555
556 #define READ_PROC_READ_GEN_UNROLL (1 << 25)
557 #define READ_PROC_ACCESS_GEN_UNROLL (1 << 26)
558
559 #define READ_PROC_FOURTH_MB (1 << 27)
560
561 /* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */
562 #define READ_UNLOCK_UNROLL_BASE 28
563 #define READ_UNLOCK_OUT_UNROLL (1 << 29)
564
565
566 /* Should not include branches */
567 #define READ_PROC_ALL_TOKENS (READ_PROD_NONE \
568 | READ_LOCK_OUT \
569 | READ_PROC_FIRST_MB \
570 | READ_LOCK_NESTED_OUT \
571 | READ_PROC_READ_GEN \
572 | READ_PROC_ACCESS_GEN \
573 | READ_UNLOCK_NESTED_OUT \
574 | READ_PROC_SECOND_MB \
575 | READ_UNLOCK_OUT \
576 | READ_LOCK_OUT_UNROLL \
577 | READ_PROC_THIRD_MB \
578 | READ_PROC_READ_GEN_UNROLL \
579 | READ_PROC_ACCESS_GEN_UNROLL \
580 | READ_PROC_FOURTH_MB \
581 | READ_UNLOCK_OUT_UNROLL)
582
583 /* Must clear all tokens, including branches */
584 #define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1)
585
586 inline urcu_one_read(i, j, nest_i, tmp, tmp2)
587 {
588 PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE);
589
590 #ifdef NO_MB
591 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB);
592 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB);
593 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB);
594 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB);
595 #endif
596
597 #ifdef REMOTE_BARRIERS
598 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB);
599 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB);
600 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB);
601 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB);
602 #endif
603
604 do
605 :: 1 ->
606
607 #ifdef REMOTE_BARRIERS
608 /*
609 * Signal-based memory barrier will only execute when the
610 * execution order appears in program order.
611 */
612 if
613 :: 1 ->
614 atomic {
615 if
616 :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE,
617 READ_LOCK_OUT | READ_LOCK_NESTED_OUT
618 | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
619 | READ_UNLOCK_OUT
620 | READ_LOCK_OUT_UNROLL
621 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
622 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT,
623 READ_LOCK_NESTED_OUT
624 | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
625 | READ_UNLOCK_OUT
626 | READ_LOCK_OUT_UNROLL
627 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
628 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT,
629 READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
630 | READ_UNLOCK_OUT
631 | READ_LOCK_OUT_UNROLL
632 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
633 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
634 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN,
635 READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
636 | READ_UNLOCK_OUT
637 | READ_LOCK_OUT_UNROLL
638 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
639 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
640 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN,
641 READ_UNLOCK_NESTED_OUT
642 | READ_UNLOCK_OUT
643 | READ_LOCK_OUT_UNROLL
644 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
645 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
646 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN
647 | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT,
648 READ_UNLOCK_OUT
649 | READ_LOCK_OUT_UNROLL
650 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
651 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
652 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN
653 | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
654 | READ_UNLOCK_OUT,
655 READ_LOCK_OUT_UNROLL
656 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
657 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
658 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN
659 | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
660 | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL,
661 READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
662 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
663 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN
664 | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
665 | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL
666 | READ_PROC_READ_GEN_UNROLL,
667 READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL)
668 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
669 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN
670 | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
671 | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL
672 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL,
673 READ_UNLOCK_OUT_UNROLL)
674 || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT
675 | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT
676 | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL
677 | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL,
678 0) ->
679 goto non_atomic3;
680 non_atomic3_end:
681 skip;
682 fi;
683 }
684 fi;
685
686 goto non_atomic3_skip;
687 non_atomic3:
688 smp_mb_recv(i, j);
689 goto non_atomic3_end;
690 non_atomic3_skip:
691
692 #endif /* REMOTE_BARRIERS */
693
694 atomic {
695 if
696 PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT);
697
698 :: CONSUME_TOKENS(proc_urcu_reader,
699 READ_LOCK_OUT, /* post-dominant */
700 READ_PROC_FIRST_MB) ->
701 smp_mb_reader(i, j);
702 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB);
703
704 PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT,
705 READ_LOCK_NESTED_OUT);
706
707 :: CONSUME_TOKENS(proc_urcu_reader,
708 READ_PROC_FIRST_MB, /* mb() orders reads */
709 READ_PROC_READ_GEN) ->
710 ooo_mem(i);
711 ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr);
712 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN);
713
714 :: CONSUME_TOKENS(proc_urcu_reader,
715 READ_PROC_FIRST_MB /* mb() orders reads */
716 | READ_PROC_READ_GEN,
717 READ_PROC_ACCESS_GEN) ->
718 /* smp_read_barrier_depends */
719 goto rmb1;
720 rmb1_end:
721 data_read_first[get_readerid()] =
722 READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]);
723 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN);
724
725
726 /* Note : we remove the nested memory barrier from the read unlock
727 * model, given it is not usually needed. The implementation has the barrier
728 * because the performance impact added by a branch in the common case does not
729 * justify it.
730 */
731
732 PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE,
733 READ_PROC_FIRST_MB
734 | READ_LOCK_OUT
735 | READ_LOCK_NESTED_OUT,
736 READ_UNLOCK_NESTED_OUT);
737
738
739 :: CONSUME_TOKENS(proc_urcu_reader,
740 READ_PROC_ACCESS_GEN /* mb() orders reads */
741 | READ_PROC_READ_GEN /* mb() orders reads */
742 | READ_PROC_FIRST_MB /* mb() ordered */
743 | READ_LOCK_OUT /* post-dominant */
744 | READ_LOCK_NESTED_OUT /* post-dominant */
745 | READ_UNLOCK_NESTED_OUT,
746 READ_PROC_SECOND_MB) ->
747 smp_mb_reader(i, j);
748 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB);
749
750 PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE,
751 READ_PROC_SECOND_MB /* mb() orders reads */
752 | READ_PROC_FIRST_MB /* mb() orders reads */
753 | READ_LOCK_NESTED_OUT /* RAW */
754 | READ_LOCK_OUT /* RAW */
755 | READ_UNLOCK_NESTED_OUT, /* RAW */
756 READ_UNLOCK_OUT);
757
758 /* Unrolling loop : second consecutive lock */
759 /* reading urcu_active_readers, which have been written by
760 * READ_UNLOCK_OUT : RAW */
761 PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE,
762 READ_PROC_SECOND_MB /* mb() orders reads */
763 | READ_PROC_FIRST_MB, /* mb() orders reads */
764 READ_LOCK_NESTED_OUT /* RAW */
765 | READ_LOCK_OUT /* RAW */
766 | READ_UNLOCK_NESTED_OUT /* RAW */
767 | READ_UNLOCK_OUT, /* RAW */
768 READ_LOCK_OUT_UNROLL);
769
770
771 :: CONSUME_TOKENS(proc_urcu_reader,
772 READ_PROC_FIRST_MB /* mb() ordered */
773 | READ_PROC_SECOND_MB /* mb() ordered */
774 | READ_LOCK_OUT_UNROLL /* post-dominant */
775 | READ_LOCK_NESTED_OUT
776 | READ_LOCK_OUT
777 | READ_UNLOCK_NESTED_OUT
778 | READ_UNLOCK_OUT,
779 READ_PROC_THIRD_MB) ->
780 smp_mb_reader(i, j);
781 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB);
782
783 :: CONSUME_TOKENS(proc_urcu_reader,
784 READ_PROC_FIRST_MB /* mb() orders reads */
785 | READ_PROC_SECOND_MB /* mb() orders reads */
786 | READ_PROC_THIRD_MB, /* mb() orders reads */
787 READ_PROC_READ_GEN_UNROLL) ->
788 ooo_mem(i);
789 ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr);
790 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL);
791
792 :: CONSUME_TOKENS(proc_urcu_reader,
793 READ_PROC_READ_GEN_UNROLL
794 | READ_PROC_FIRST_MB /* mb() orders reads */
795 | READ_PROC_SECOND_MB /* mb() orders reads */
796 | READ_PROC_THIRD_MB, /* mb() orders reads */
797 READ_PROC_ACCESS_GEN_UNROLL) ->
798 /* smp_read_barrier_depends */
799 goto rmb2;
800 rmb2_end:
801 data_read_second[get_readerid()] =
802 READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]);
803 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL);
804
805 :: CONSUME_TOKENS(proc_urcu_reader,
806 READ_PROC_READ_GEN_UNROLL /* mb() orders reads */
807 | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */
808 | READ_PROC_FIRST_MB /* mb() ordered */
809 | READ_PROC_SECOND_MB /* mb() ordered */
810 | READ_PROC_THIRD_MB /* mb() ordered */
811 | READ_LOCK_OUT_UNROLL /* post-dominant */
812 | READ_LOCK_NESTED_OUT
813 | READ_LOCK_OUT
814 | READ_UNLOCK_NESTED_OUT
815 | READ_UNLOCK_OUT,
816 READ_PROC_FOURTH_MB) ->
817 smp_mb_reader(i, j);
818 PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB);
819
820 PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE,
821 READ_PROC_FOURTH_MB /* mb() orders reads */
822 | READ_PROC_THIRD_MB /* mb() orders reads */
823 | READ_LOCK_OUT_UNROLL /* RAW */
824 | READ_PROC_SECOND_MB /* mb() orders reads */
825 | READ_PROC_FIRST_MB /* mb() orders reads */
826 | READ_LOCK_NESTED_OUT /* RAW */
827 | READ_LOCK_OUT /* RAW */
828 | READ_UNLOCK_NESTED_OUT, /* RAW */
829 READ_UNLOCK_OUT_UNROLL);
830 :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) ->
831 CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR);
832 break;
833 fi;
834 }
835 od;
836 /*
837 * Dependency between consecutive loops :
838 * RAW dependency on
839 * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1)
840 * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]);
841 * between loops.
842 * _WHEN THE MB()s are in place_, they add full ordering of the
843 * generation pointer read wrt active reader count read, which ensures
844 * execution will not spill across loop execution.
845 * However, in the event mb()s are removed (execution using signal
846 * handler to promote barrier()() -> smp_mb()), nothing prevents one loop
847 * to spill its execution on other loop's execution.
848 */
849 goto end;
850 rmb1:
851 #ifndef NO_RMB
852 smp_rmb(i);
853 #else
854 ooo_mem(i);
855 #endif
856 goto rmb1_end;
857 rmb2:
858 #ifndef NO_RMB
859 smp_rmb(i);
860 #else
861 ooo_mem(i);
862 #endif
863 goto rmb2_end;
864 end:
865 skip;
866 }
867
868
869
870 active proctype urcu_reader()
871 {
872 byte i, j, nest_i;
873 byte tmp, tmp2;
874
875 /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */
876 DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr);
877 /* Note ! currently only one reader */
878 DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]);
879 /* RCU data */
880 DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]);
881
882 /* RCU pointer */
883 #if (SLAB_SIZE == 2)
884 DECLARE_PROC_CACHED_VAR(bit, rcu_ptr);
885 #else
886 DECLARE_PROC_CACHED_VAR(byte, rcu_ptr);
887 #endif
888
889 atomic {
890 INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1);
891 INIT_PROC_CACHED_VAR(rcu_ptr, 0);
892
893 i = 0;
894 do
895 :: i < NR_READERS ->
896 INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0);
897 i++;
898 :: i >= NR_READERS -> break
899 od;
900 INIT_PROC_CACHED_VAR(rcu_data[0], WINE);
901 i = 1;
902 do
903 :: i < SLAB_SIZE ->
904 INIT_PROC_CACHED_VAR(rcu_data[i], POISON);
905 i++
906 :: i >= SLAB_SIZE -> break
907 od;
908 }
909
910 wait_init_done();
911
912 assert(get_pid() < NR_PROCS);
913
914 end_reader:
915 do
916 :: 1 ->
917 /*
918 * We do not test reader's progress here, because we are mainly
919 * interested in writer's progress. The reader never blocks
920 * anyway. We have to test for reader/writer's progress
921 * separately, otherwise we could think the writer is doing
922 * progress when it's blocked by an always progressing reader.
923 */
924 #ifdef READER_PROGRESS
925 progress_reader:
926 #endif
927 urcu_one_read(i, j, nest_i, tmp, tmp2);
928 od;
929 }
930
931 /* no name clash please */
932 #undef proc_urcu_reader
933
934
935 /* Model the RCU update process. */
936
937 /*
938 * Bit encoding, urcu_writer :
939 * Currently only supports one reader.
940 */
941
942 int _proc_urcu_writer;
943 #define proc_urcu_writer _proc_urcu_writer
944
945 #define WRITE_PROD_NONE (1 << 0)
946
947 #define WRITE_DATA (1 << 1)
948 #define WRITE_PROC_WMB (1 << 2)
949 #define WRITE_XCHG_PTR (1 << 3)
950
951 #define WRITE_PROC_FIRST_MB (1 << 4)
952
953 /* first flip */
954 #define WRITE_PROC_FIRST_READ_GP (1 << 5)
955 #define WRITE_PROC_FIRST_WRITE_GP (1 << 6)
956 #define WRITE_PROC_FIRST_WAIT (1 << 7)
957 #define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8)
958
959 /* second flip */
960 #define WRITE_PROC_SECOND_READ_GP (1 << 9)
961 #define WRITE_PROC_SECOND_WRITE_GP (1 << 10)
962 #define WRITE_PROC_SECOND_WAIT (1 << 11)
963 #define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12)
964
965 #define WRITE_PROC_SECOND_MB (1 << 13)
966
967 #define WRITE_FREE (1 << 14)
968
969 #define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \
970 | WRITE_DATA \
971 | WRITE_PROC_WMB \
972 | WRITE_XCHG_PTR \
973 | WRITE_PROC_FIRST_MB \
974 | WRITE_PROC_FIRST_READ_GP \
975 | WRITE_PROC_FIRST_WRITE_GP \
976 | WRITE_PROC_FIRST_WAIT \
977 | WRITE_PROC_SECOND_READ_GP \
978 | WRITE_PROC_SECOND_WRITE_GP \
979 | WRITE_PROC_SECOND_WAIT \
980 | WRITE_PROC_SECOND_MB \
981 | WRITE_FREE)
982
983 #define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1)
984
985 /*
986 * Mutexes are implied around writer execution. A single writer at a time.
987 */
988 active proctype urcu_writer()
989 {
990 byte i, j;
991 byte tmp, tmp2, tmpa;
992 byte cur_data = 0, old_data, loop_nr = 0;
993 byte cur_gp_val = 0; /*
994 * Keep a local trace of the current parity so
995 * we don't add non-existing dependencies on the global
996 * GP update. Needed to test single flip case.
997 */
998
999 /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */
1000 DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr);
1001 /* Note ! currently only one reader */
1002 DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]);
1003 /* RCU data */
1004 DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]);
1005
1006 /* RCU pointer */
1007 #if (SLAB_SIZE == 2)
1008 DECLARE_PROC_CACHED_VAR(bit, rcu_ptr);
1009 #else
1010 DECLARE_PROC_CACHED_VAR(byte, rcu_ptr);
1011 #endif
1012
1013 atomic {
1014 INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1);
1015 INIT_PROC_CACHED_VAR(rcu_ptr, 0);
1016
1017 i = 0;
1018 do
1019 :: i < NR_READERS ->
1020 INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0);
1021 i++;
1022 :: i >= NR_READERS -> break
1023 od;
1024 INIT_PROC_CACHED_VAR(rcu_data[0], WINE);
1025 i = 1;
1026 do
1027 :: i < SLAB_SIZE ->
1028 INIT_PROC_CACHED_VAR(rcu_data[i], POISON);
1029 i++
1030 :: i >= SLAB_SIZE -> break
1031 od;
1032 }
1033
1034
1035 wait_init_done();
1036
1037 assert(get_pid() < NR_PROCS);
1038
1039 do
1040 :: (loop_nr < 3) ->
1041 #ifdef WRITER_PROGRESS
1042 progress_writer1:
1043 #endif
1044 loop_nr = loop_nr + 1;
1045
1046 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE);
1047
1048 #ifdef NO_WMB
1049 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB);
1050 #endif
1051
1052 #ifdef NO_MB
1053 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB);
1054 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB);
1055 #endif
1056
1057 #ifdef SINGLE_FLIP
1058 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP);
1059 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP);
1060 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT);
1061 /* For single flip, we need to know the current parity */
1062 cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT;
1063 #endif
1064
1065 do :: 1 ->
1066 atomic {
1067 if
1068
1069 :: CONSUME_TOKENS(proc_urcu_writer,
1070 WRITE_PROD_NONE,
1071 WRITE_DATA) ->
1072 ooo_mem(i);
1073 cur_data = (cur_data + 1) % SLAB_SIZE;
1074 WRITE_CACHED_VAR(rcu_data[cur_data], WINE);
1075 PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA);
1076
1077
1078 :: CONSUME_TOKENS(proc_urcu_writer,
1079 WRITE_DATA,
1080 WRITE_PROC_WMB) ->
1081 smp_wmb(i);
1082 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB);
1083
1084 :: CONSUME_TOKENS(proc_urcu_writer,
1085 WRITE_PROC_WMB,
1086 WRITE_XCHG_PTR) ->
1087 /* rcu_xchg_pointer() */
1088 atomic {
1089 old_data = READ_CACHED_VAR(rcu_ptr);
1090 WRITE_CACHED_VAR(rcu_ptr, cur_data);
1091 }
1092 PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR);
1093
1094 :: CONSUME_TOKENS(proc_urcu_writer,
1095 WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR,
1096 WRITE_PROC_FIRST_MB) ->
1097 goto smp_mb_send1;
1098 smp_mb_send1_end:
1099 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB);
1100
1101 /* first flip */
1102 :: CONSUME_TOKENS(proc_urcu_writer,
1103 WRITE_PROC_FIRST_MB,
1104 WRITE_PROC_FIRST_READ_GP) ->
1105 tmpa = READ_CACHED_VAR(urcu_gp_ctr);
1106 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP);
1107 :: CONSUME_TOKENS(proc_urcu_writer,
1108 WRITE_PROC_FIRST_MB | WRITE_PROC_WMB
1109 | WRITE_PROC_FIRST_READ_GP,
1110 WRITE_PROC_FIRST_WRITE_GP) ->
1111 ooo_mem(i);
1112 WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT);
1113 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP);
1114
1115 :: CONSUME_TOKENS(proc_urcu_writer,
1116 //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */
1117 WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */
1118 WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) ->
1119 ooo_mem(i);
1120 //smp_mb(i); /* TEST */
1121 /* ONLY WAITING FOR READER 0 */
1122 tmp2 = READ_CACHED_VAR(urcu_active_readers[0]);
1123 #ifndef SINGLE_FLIP
1124 /* In normal execution, we are always starting by
1125 * waiting for the even parity.
1126 */
1127 cur_gp_val = RCU_GP_CTR_BIT;
1128 #endif
1129 if
1130 :: (tmp2 & RCU_GP_CTR_NEST_MASK)
1131 && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) ->
1132 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP);
1133 :: else ->
1134 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT);
1135 fi;
1136
1137 :: CONSUME_TOKENS(proc_urcu_writer,
1138 //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */
1139 WRITE_PROC_FIRST_WRITE_GP
1140 | WRITE_PROC_FIRST_READ_GP
1141 | WRITE_PROC_FIRST_WAIT_LOOP
1142 | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR
1143 | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */
1144 0) ->
1145 #ifndef GEN_ERROR_WRITER_PROGRESS
1146 goto smp_mb_send2;
1147 smp_mb_send2_end:
1148 /* The memory barrier will invalidate the
1149 * second read done as prefetching. Note that all
1150 * instructions with side-effects depending on
1151 * WRITE_PROC_SECOND_READ_GP should also depend on
1152 * completion of this busy-waiting loop. */
1153 CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP);
1154 #else
1155 ooo_mem(i);
1156 #endif
1157 /* This instruction loops to WRITE_PROC_FIRST_WAIT */
1158 CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT);
1159
1160 /* second flip */
1161 :: CONSUME_TOKENS(proc_urcu_writer,
1162 //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */
1163 WRITE_PROC_FIRST_WRITE_GP
1164 | WRITE_PROC_FIRST_READ_GP
1165 | WRITE_PROC_FIRST_MB,
1166 WRITE_PROC_SECOND_READ_GP) ->
1167 ooo_mem(i);
1168 //smp_mb(i); /* TEST */
1169 tmpa = READ_CACHED_VAR(urcu_gp_ctr);
1170 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP);
1171 :: CONSUME_TOKENS(proc_urcu_writer,
1172 WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this
1173 * instruction has globally observable
1174 * side-effects.
1175 */
1176 | WRITE_PROC_FIRST_MB
1177 | WRITE_PROC_WMB
1178 | WRITE_PROC_FIRST_READ_GP
1179 | WRITE_PROC_FIRST_WRITE_GP
1180 | WRITE_PROC_SECOND_READ_GP,
1181 WRITE_PROC_SECOND_WRITE_GP) ->
1182 ooo_mem(i);
1183 WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT);
1184 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP);
1185
1186 :: CONSUME_TOKENS(proc_urcu_writer,
1187 //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */
1188 WRITE_PROC_FIRST_WAIT
1189 | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */
1190 WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) ->
1191 ooo_mem(i);
1192 //smp_mb(i); /* TEST */
1193 /* ONLY WAITING FOR READER 0 */
1194 tmp2 = READ_CACHED_VAR(urcu_active_readers[0]);
1195 if
1196 :: (tmp2 & RCU_GP_CTR_NEST_MASK)
1197 && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) ->
1198 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP);
1199 :: else ->
1200 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT);
1201 fi;
1202
1203 :: CONSUME_TOKENS(proc_urcu_writer,
1204 //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */
1205 WRITE_PROC_SECOND_WRITE_GP
1206 | WRITE_PROC_FIRST_WRITE_GP
1207 | WRITE_PROC_SECOND_READ_GP
1208 | WRITE_PROC_FIRST_READ_GP
1209 | WRITE_PROC_SECOND_WAIT_LOOP
1210 | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR
1211 | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */
1212 0) ->
1213 #ifndef GEN_ERROR_WRITER_PROGRESS
1214 goto smp_mb_send3;
1215 smp_mb_send3_end:
1216 #else
1217 ooo_mem(i);
1218 #endif
1219 /* This instruction loops to WRITE_PROC_SECOND_WAIT */
1220 CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT);
1221
1222
1223 :: CONSUME_TOKENS(proc_urcu_writer,
1224 WRITE_PROC_FIRST_WAIT
1225 | WRITE_PROC_SECOND_WAIT
1226 | WRITE_PROC_FIRST_READ_GP
1227 | WRITE_PROC_SECOND_READ_GP
1228 | WRITE_PROC_FIRST_WRITE_GP
1229 | WRITE_PROC_SECOND_WRITE_GP
1230 | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR
1231 | WRITE_PROC_FIRST_MB,
1232 WRITE_PROC_SECOND_MB) ->
1233 goto smp_mb_send4;
1234 smp_mb_send4_end:
1235 PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB);
1236
1237 :: CONSUME_TOKENS(proc_urcu_writer,
1238 WRITE_XCHG_PTR
1239 | WRITE_PROC_FIRST_WAIT
1240 | WRITE_PROC_SECOND_WAIT
1241 | WRITE_PROC_WMB /* No dependency on
1242 * WRITE_DATA because we
1243 * write to a
1244 * different location. */
1245 | WRITE_PROC_SECOND_MB
1246 | WRITE_PROC_FIRST_MB,
1247 WRITE_FREE) ->
1248 WRITE_CACHED_VAR(rcu_data[old_data], POISON);
1249 PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE);
1250
1251 :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) ->
1252 CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR);
1253 break;
1254 fi;
1255 }
1256 od;
1257 /*
1258 * Note : Promela model adds implicit serialization of the
1259 * WRITE_FREE instruction. Normally, it would be permitted to
1260 * spill on the next loop execution. Given the validation we do
1261 * checks for the data entry read to be poisoned, it's ok if
1262 * we do not check "late arriving" memory poisoning.
1263 */
1264 :: else -> break;
1265 od;
1266 /*
1267 * Given the reader loops infinitely, let the writer also busy-loop
1268 * with progress here so, with weak fairness, we can test the
1269 * writer's progress.
1270 */
1271 end_writer:
1272 do
1273 :: 1 ->
1274 #ifdef WRITER_PROGRESS
1275 progress_writer2:
1276 #endif
1277 #ifdef READER_PROGRESS
1278 /*
1279 * Make sure we don't block the reader's progress.
1280 */
1281 smp_mb_send(i, j, 5);
1282 #endif
1283 skip;
1284 od;
1285
1286 /* Non-atomic parts of the loop */
1287 goto end;
1288 smp_mb_send1:
1289 smp_mb_send(i, j, 1);
1290 goto smp_mb_send1_end;
1291 #ifndef GEN_ERROR_WRITER_PROGRESS
1292 smp_mb_send2:
1293 smp_mb_send(i, j, 2);
1294 goto smp_mb_send2_end;
1295 smp_mb_send3:
1296 smp_mb_send(i, j, 3);
1297 goto smp_mb_send3_end;
1298 #endif
1299 smp_mb_send4:
1300 smp_mb_send(i, j, 4);
1301 goto smp_mb_send4_end;
1302 end:
1303 skip;
1304 }
1305
1306 /* no name clash please */
1307 #undef proc_urcu_writer
1308
1309
1310 /* Leave after the readers and writers so the pid count is ok. */
1311 init {
1312 byte i, j;
1313
1314 atomic {
1315 INIT_CACHED_VAR(urcu_gp_ctr, 1);
1316 INIT_CACHED_VAR(rcu_ptr, 0);
1317
1318 i = 0;
1319 do
1320 :: i < NR_READERS ->
1321 INIT_CACHED_VAR(urcu_active_readers[i], 0);
1322 ptr_read_first[i] = 1;
1323 ptr_read_second[i] = 1;
1324 data_read_first[i] = WINE;
1325 data_read_second[i] = WINE;
1326 i++;
1327 :: i >= NR_READERS -> break
1328 od;
1329 INIT_CACHED_VAR(rcu_data[0], WINE);
1330 i = 1;
1331 do
1332 :: i < SLAB_SIZE ->
1333 INIT_CACHED_VAR(rcu_data[i], POISON);
1334 i++
1335 :: i >= SLAB_SIZE -> break
1336 od;
1337
1338 init_done = 1;
1339 }
1340 }
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