[urcu.git] / formal-model / ooomem-two-writes / mem.spin

/*
 * mem.spin: Promela code to validate memory barriers with OOO memory.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 *
 * Copyright (c) 2009 Mathieu Desnoyers
 */

/* Promela validation variables. */

/*
 * Produced process control and data flow. Updated after each instruction to
 * show which variables are ready. Using one-hot bit encoding per variable to
 * save state space. Used as triggers to execute the instructions having those
 * variables as input. Leaving bits active to inhibit instruction execution.
 * Scheme used to make instruction disabling and automatic dependency fall-back
 * automatic.
 */

#define CONSUME_TOKENS(state, bits, notbits)			\
	((!(state & (notbits))) && (state & (bits)) == (bits))

#define PRODUCE_TOKENS(state, bits)				\
	state = state | (bits);

#define CLEAR_TOKENS(state, bits)				\
	state = state & ~(bits)

#define NR_PROCS 2

#define get_pid()	(_pid)

/*
 * Each process have its own data in cache. Caches are randomly updated.
 * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces
 * both.
 */

#define DECLARE_CACHED_VAR(type, x, v)		\
	type mem_##x = v;			\
	type cached_##x[NR_PROCS] = v;		\
	bit cache_dirty_##x[NR_PROCS] = 0;

#define IS_CACHE_DIRTY(x, id)	(cache_dirty_##x[id])

#define READ_CACHED_VAR(x)			\
	(cached_##x[get_pid()])

#define WRITE_CACHED_VAR(x, v)			\
	atomic {				\
		cached_##x[get_pid()] = v;	\
		cache_dirty_##x[get_pid()] = 1;	\
	}

#define CACHE_WRITE_TO_MEM(x, id)		\
	if					\
	:: IS_CACHE_DIRTY(x, id) ->		\
		mem_##x = cached_##x[id];	\
		cache_dirty_##x[id] = 0;	\
	:: else ->				\
		skip				\
	fi;

#define CACHE_READ_FROM_MEM(x, id)		\
	if					\
	:: !IS_CACHE_DIRTY(x, id) ->		\
		cached_##x[id] = mem_##x;	\
	:: else ->				\
		skip				\
	fi;

/*
 * May update other caches if cache is dirty, or not.
 */
#define RANDOM_CACHE_WRITE_TO_MEM(x, id)	\
	if					\
	:: 1 -> CACHE_WRITE_TO_MEM(x, id);	\
	:: 1 -> skip				\
	fi;

#define RANDOM_CACHE_READ_FROM_MEM(x, id)\
	if					\
	:: 1 -> CACHE_READ_FROM_MEM(x, id);	\
	:: 1 -> skip				\
	fi;

inline ooo_mem()
{
	atomic {
		RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid());
		RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid());
		RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid());
		RANDOM_CACHE_READ_FROM_MEM(beta, get_pid());
	}
}

/* must consume all prior read tokens */
inline smp_rmb()
{
	atomic {
		/* todo : consume all read tokens .. ? */
		CACHE_READ_FROM_MEM(alpha, get_pid());
		CACHE_READ_FROM_MEM(beta, get_pid());
	}
}

/* must consume all prior write tokens */
inline smp_wmb()
{
	atomic {
		CACHE_WRITE_TO_MEM(alpha, get_pid());
		CACHE_WRITE_TO_MEM(beta, get_pid());
	}
}

/* sync_core() must consume all prior read and write tokens, including rmb/wmb
 * tokens */

/* must consume all prior read and write tokens */
inline smp_mb()
{
	atomic {
		smp_wmb();
		/* sync_core() */
		smp_rmb();
	}
}

/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */
DECLARE_CACHED_VAR(byte, alpha, 0);
DECLARE_CACHED_VAR(byte, beta, 0);

/* value 2 is uninitialized */
byte read_one = 2;
byte read_two = 2;

/*
 * Bit encoding, proc_one_produced :
 */

#define P1_PROD_NONE	(1 << 0)

#define P1_WRITE	(1 << 1)
#define P1_WMB		(1 << 2)
#define P1_SYNC_CORE	(1 << 3)
#define P1_RMB		(1 << 4)
#define P1_READ		(1 << 5)

int proc_one_produced;

active proctype test_proc_one()
{
	assert(get_pid() < NR_PROCS);

	PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE);

#ifdef NO_WMB
	PRODUCE_TOKENS(proc_one_produced, P1_WMB);
#endif
#ifdef NO_RMB
	PRODUCE_TOKENS(proc_one_produced, P1_RMB);
#endif
#ifdef NO_SYNC
	PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
#endif

	do
	:: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) ->
		ooo_mem();
		WRITE_CACHED_VAR(alpha, 1);
		ooo_mem();
		PRODUCE_TOKENS(proc_one_produced, P1_WRITE);
	:: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) ->
		smp_wmb();
		PRODUCE_TOKENS(proc_one_produced, P1_WMB);
	:: CONSUME_TOKENS(proc_one_produced, P1_WRITE | P1_WMB, P1_SYNC_CORE) ->
		/* sync_core(); */
		PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
	:: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) ->
		smp_rmb();
		PRODUCE_TOKENS(proc_one_produced, P1_RMB);
	:: CONSUME_TOKENS(proc_one_produced, P1_RMB | P1_SYNC_CORE, P1_READ) ->
		ooo_mem();
		read_one = READ_CACHED_VAR(beta);
		ooo_mem();
		PRODUCE_TOKENS(proc_one_produced, P1_READ);
	:: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE | P1_WRITE
		| P1_WMB | P1_SYNC_CORE | P1_RMB | P1_READ, 0) ->
		break;
	od;

	//CLEAR_TOKENS(proc_one_produced,
	//	P1_PROD_NONE | P1_WRITE | P1_WMB | P1_SYNC_CORE | P1_RMB |
	//	P2_READ);

	// test : [] (read_one == 0 -> read_two != 0)
	// test : [] (read_two == 0 -> read_one != 0)
	assert(!(read_one == 0 && read_two == 0));
}


/*
 * Bit encoding, proc_two_produced :
 */

#define P2_PROD_NONE	(1 << 0)

#define P2_WRITE	(1 << 1)
#define P2_WMB		(1 << 2)
#define P2_SYNC_CORE	(1 << 3)
#define P2_RMB		(1 << 4)
#define P2_READ		(1 << 5)

int proc_two_produced;

active proctype test_proc_two()
{
	assert(get_pid() < NR_PROCS);

	PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE);

#ifdef NO_WMB
	PRODUCE_TOKENS(proc_two_produced, P2_WMB);
#endif
#ifdef NO_RMB
	PRODUCE_TOKENS(proc_two_produced, P2_RMB);
#endif
#ifdef NO_SYNC
	PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
#endif

	do
	:: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) ->
		ooo_mem();
		WRITE_CACHED_VAR(beta, 1);
		ooo_mem();
		PRODUCE_TOKENS(proc_two_produced, P2_WRITE);
	:: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) ->
		smp_wmb();
		PRODUCE_TOKENS(proc_two_produced, P2_WMB);
	:: CONSUME_TOKENS(proc_two_produced, P2_WRITE | P2_WMB, P2_SYNC_CORE) ->
		/* sync_core(); */
		PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
	:: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) ->
		smp_rmb();
		PRODUCE_TOKENS(proc_two_produced, P2_RMB);
	:: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE | P2_RMB, P2_READ) ->
		ooo_mem();
		read_two = READ_CACHED_VAR(alpha);
		ooo_mem();
		PRODUCE_TOKENS(proc_two_produced, P2_READ);
	:: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE | P2_WRITE
		| P2_WMB | P2_SYNC_CORE | P2_RMB | P2_READ, 0) ->
		break;
	od;

	//CLEAR_TOKENS(proc_two_produced,
	//	P2_PROD_NONE | P2_WRITE | P2_WMB | P2_SYNC_CORE | P2_RMB |
	//	P2_READ);

	// test : [] (read_one == 0 -> read_two != 0)
	// test : [] (read_two == 0 -> read_one != 0)
	assert(!(read_one == 0 && read_two == 0));
}
Commit	Line	Data
03c9e0f3 MD	1	/*
	2	* mem.spin: Promela code to validate memory barriers with OOO memory.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	17	*
	18	* Copyright (c) 2009 Mathieu Desnoyers
	19	*/
	20
	21	/* Promela validation variables. */
	22
	23	/*
dfa8abef MD	24	* Produced process control and data flow. Updated after each instruction to
	25	* show which variables are ready. Using one-hot bit encoding per variable to
	26	* save state space. Used as triggers to execute the instructions having those
	27	* variables as input. Leaving bits active to inhibit instruction execution.
	28	* Scheme used to make instruction disabling and automatic dependency fall-back
	29	* automatic.
03c9e0f3 MD	30	*/
03c9e0f3 MD	31
dfa8abef MD	32	#define CONSUME_TOKENS(state, bits, notbits) \
dfa8abef MD	33	((!(state & (notbits))) && (state & (bits)) == (bits))
03c9e0f3	34
dfa8abef MD	35	#define PRODUCE_TOKENS(state, bits) \
dfa8abef MD	36	state = state \| (bits);
03c9e0f3	37
dfa8abef MD	38	#define CLEAR_TOKENS(state, bits) \
dfa8abef MD	39	state = state & ~(bits)
03c9e0f3	40
03c9e0f3 MD	41	#define NR_PROCS 2
	42
	43	#define get_pid() (_pid)
	44
	45	/*
	46	* Each process have its own data in cache. Caches are randomly updated.
	47	* smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces
	48	* both.
	49	*/
	50
	51	#define DECLARE_CACHED_VAR(type, x, v) \
	52	type mem_##x = v; \
	53	type cached_##x[NR_PROCS] = v; \
	54	bit cache_dirty_##x[NR_PROCS] = 0;
	55
	56	#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id])
	57
	58	#define READ_CACHED_VAR(x) \
	59	(cached_##x[get_pid()])
	60
	61	#define WRITE_CACHED_VAR(x, v) \
	62	atomic { \
	63	cached_##x[get_pid()] = v; \
	64	cache_dirty_##x[get_pid()] = 1; \
	65	}
	66
	67	#define CACHE_WRITE_TO_MEM(x, id) \
	68	if \
	69	:: IS_CACHE_DIRTY(x, id) -> \
	70	mem_##x = cached_##x[id]; \
	71	cache_dirty_##x[id] = 0; \
	72	:: else -> \
	73	skip \
	74	fi;
	75
	76	#define CACHE_READ_FROM_MEM(x, id) \
	77	if \
	78	:: !IS_CACHE_DIRTY(x, id) -> \
	79	cached_##x[id] = mem_##x; \
	80	:: else -> \
	81	skip \
	82	fi;
	83
	84	/*
	85	* May update other caches if cache is dirty, or not.
	86	*/
	87	#define RANDOM_CACHE_WRITE_TO_MEM(x, id) \
	88	if \
	89	:: 1 -> CACHE_WRITE_TO_MEM(x, id); \
	90	:: 1 -> skip \
	91	fi;
	92
	93	#define RANDOM_CACHE_READ_FROM_MEM(x, id)\
	94	if \
	95	:: 1 -> CACHE_READ_FROM_MEM(x, id); \
	96	:: 1 -> skip \
	97	fi;
	98
	99	inline ooo_mem()
	100	{
	101	atomic {
	102	RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid());
	103	RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid());
	104	RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid());
105	RANDOM_CACHE_READ_FROM_MEM(beta, get_pid());
106	}
107	}
108
109	/* must consume all prior read tokens */
110	inline smp_rmb()
111	{
112	atomic {
113	/* todo : consume all read tokens .. ? */
114	CACHE_READ_FROM_MEM(alpha, get_pid());
115	CACHE_READ_FROM_MEM(beta, get_pid());
116	}
117	}
118
119	/* must consume all prior write tokens */
120	inline smp_wmb()
121	{
122	atomic {
123	CACHE_WRITE_TO_MEM(alpha, get_pid());
124	CACHE_WRITE_TO_MEM(beta, get_pid());
125	}
126	}
127
128	/* sync_core() must consume all prior read and write tokens, including rmb/wmb
129	* tokens */
130
131	/* must consume all prior read and write tokens */
132	inline smp_mb()
133	{
134	atomic {
135	smp_wmb();
136	/* sync_core() */
137	smp_rmb();
138	}
139	}
140
141	/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */
142	DECLARE_CACHED_VAR(byte, alpha, 0);
143	DECLARE_CACHED_VAR(byte, beta, 0);
144
145	/* value 2 is uninitialized */
146	byte read_one = 2;
147	byte read_two = 2;
148
3db2d75b MD	149	/*
	150	* Bit encoding, proc_one_produced :
	151	*/
	152
	153	#define P1_PROD_NONE (1 << 0)
	154
	155	#define P1_WRITE (1 << 1)
	156	#define P1_WMB (1 << 2)
	157	#define P1_SYNC_CORE (1 << 3)
	158	#define P1_RMB (1 << 4)
	159	#define P1_READ (1 << 5)
	160
	161	int proc_one_produced;
	162
03c9e0f3 MD	163	active proctype test_proc_one()
	164	{
	165	assert(get_pid() < NR_PROCS);
	166
	167	PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE);
	168
	169	#ifdef NO_WMB
	170	PRODUCE_TOKENS(proc_one_produced, P1_WMB);
	171	#endif
	172	#ifdef NO_RMB
	173	PRODUCE_TOKENS(proc_one_produced, P1_RMB);
	174	#endif
4b8839f1 MD	175	#ifdef NO_SYNC
	176	PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
	177	#endif
03c9e0f3 MD	178
	179	do
	180	:: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) ->
	181	ooo_mem();
	182	WRITE_CACHED_VAR(alpha, 1);
	183	ooo_mem();
	184	PRODUCE_TOKENS(proc_one_produced, P1_WRITE);
	185	:: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) ->
	186	smp_wmb();
	187	PRODUCE_TOKENS(proc_one_produced, P1_WMB);
	188	:: CONSUME_TOKENS(proc_one_produced, P1_WRITE \| P1_WMB, P1_SYNC_CORE) ->
	189	/* sync_core(); */
	190	PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE);
	191	:: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) ->
	192	smp_rmb();
	193	PRODUCE_TOKENS(proc_one_produced, P1_RMB);
	194	:: CONSUME_TOKENS(proc_one_produced, P1_RMB \| P1_SYNC_CORE, P1_READ) ->
	195	ooo_mem();
	196	read_one = READ_CACHED_VAR(beta);
	197	ooo_mem();
	198	PRODUCE_TOKENS(proc_one_produced, P1_READ);
	199	:: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE \| P1_WRITE
	200	\| P1_WMB \| P1_SYNC_CORE \| P1_RMB \| P1_READ, 0) ->
	201	break;
	202	od;
	203
	204	//CLEAR_TOKENS(proc_one_produced,
	205	// P1_PROD_NONE \| P1_WRITE \| P1_WMB \| P1_SYNC_CORE \| P1_RMB \|
	206	// P2_READ);
	207
	208	// test : [] (read_one == 0 -> read_two != 0)
	209	// test : [] (read_two == 0 -> read_one != 0)
	210	assert(!(read_one == 0 && read_two == 0));
	211	}
	212
3db2d75b MD	213
	214	/*
	215	* Bit encoding, proc_two_produced :
	216	*/
	217
	218	#define P2_PROD_NONE (1 << 0)
	219
	220	#define P2_WRITE (1 << 1)
	221	#define P2_WMB (1 << 2)
	222	#define P2_SYNC_CORE (1 << 3)
	223	#define P2_RMB (1 << 4)
	224	#define P2_READ (1 << 5)
	225
	226	int proc_two_produced;
	227
03c9e0f3 MD	228	active proctype test_proc_two()
	229	{
	230	assert(get_pid() < NR_PROCS);
	231
	232	PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE);
	233
	234	#ifdef NO_WMB
	235	PRODUCE_TOKENS(proc_two_produced, P2_WMB);
	236	#endif
	237	#ifdef NO_RMB
	238	PRODUCE_TOKENS(proc_two_produced, P2_RMB);
	239	#endif
4b8839f1 MD	240	#ifdef NO_SYNC
	241	PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
	242	#endif
03c9e0f3 MD	243
	244	do
	245	:: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) ->
	246	ooo_mem();
	247	WRITE_CACHED_VAR(beta, 1);
	248	ooo_mem();
	249	PRODUCE_TOKENS(proc_two_produced, P2_WRITE);
	250	:: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) ->
	251	smp_wmb();
	252	PRODUCE_TOKENS(proc_two_produced, P2_WMB);
	253	:: CONSUME_TOKENS(proc_two_produced, P2_WRITE \| P2_WMB, P2_SYNC_CORE) ->
	254	/* sync_core(); */
	255	PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE);
	256	:: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) ->
	257	smp_rmb();
	258	PRODUCE_TOKENS(proc_two_produced, P2_RMB);
	259	:: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE \| P2_RMB, P2_READ) ->
	260	ooo_mem();
	261	read_two = READ_CACHED_VAR(alpha);
	262	ooo_mem();
	263	PRODUCE_TOKENS(proc_two_produced, P2_READ);
	264	:: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE \| P2_WRITE
	265	\| P2_WMB \| P2_SYNC_CORE \| P2_RMB \| P2_READ, 0) ->
	266	break;
	267	od;
	268
	269	//CLEAR_TOKENS(proc_two_produced,
	270	// P2_PROD_NONE \| P2_WRITE \| P2_WMB \| P2_SYNC_CORE \| P2_RMB \|
	271	// P2_READ);
	272
	273	// test : [] (read_one == 0 -> read_two != 0)
	274	// test : [] (read_two == 0 -> read_one != 0)
	275	assert(!(read_one == 0 && read_two == 0));
	276	}