[lttv.git] / obsolete / ltt-usertrace / ltt / ppc_asm-ppc.h

/*
 * include/asm-ppc/ppc_asm.h
 *
 * Definitions used by various bits of low-level assembly code on PowerPC.
 *
 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#ifndef _PPC_ASM_PPC_H
#define _PPC_ASM_PPC_H

#ifdef __cplusplus
extern "C" {
#endif

/*
 * Macros for storing registers into and loading registers from
 * exception frames.
 */
#define SAVE_GPR(n, base)	stw	n,GPR0+4*(n)(base)
#define SAVE_2GPRS(n, base)	SAVE_GPR(n, base); SAVE_GPR(n+1, base)
#define SAVE_4GPRS(n, base)	SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
#define SAVE_8GPRS(n, base)	SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
#define SAVE_10GPRS(n, base)	SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
#define REST_GPR(n, base)	lwz	n,GPR0+4*(n)(base)
#define REST_2GPRS(n, base)	REST_GPR(n, base); REST_GPR(n+1, base)
#define REST_4GPRS(n, base)	REST_2GPRS(n, base); REST_2GPRS(n+2, base)
#define REST_8GPRS(n, base)	REST_4GPRS(n, base); REST_4GPRS(n+4, base)
#define REST_10GPRS(n, base)	REST_8GPRS(n, base); REST_2GPRS(n+8, base)

#define SAVE_NVGPRS(base)	SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
				SAVE_10GPRS(22, base)
#define REST_NVGPRS(base)	REST_GPR(13, base); REST_8GPRS(14, base); \
				REST_10GPRS(22, base)

#define SAVE_FPR(n, base)	stfd	n,THREAD_FPR0+8*(n)(base)
#define SAVE_2FPRS(n, base)	SAVE_FPR(n, base); SAVE_FPR(n+1, base)
#define SAVE_4FPRS(n, base)	SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
#define SAVE_8FPRS(n, base)	SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
#define SAVE_16FPRS(n, base)	SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
#define SAVE_32FPRS(n, base)	SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
#define REST_FPR(n, base)	lfd	n,THREAD_FPR0+8*(n)(base)
#define REST_2FPRS(n, base)	REST_FPR(n, base); REST_FPR(n+1, base)
#define REST_4FPRS(n, base)	REST_2FPRS(n, base); REST_2FPRS(n+2, base)
#define REST_8FPRS(n, base)	REST_4FPRS(n, base); REST_4FPRS(n+4, base)
#define REST_16FPRS(n, base)	REST_8FPRS(n, base); REST_8FPRS(n+8, base)
#define REST_32FPRS(n, base)	REST_16FPRS(n, base); REST_16FPRS(n+16, base)

#define SAVE_VR(n,b,base)	li b,THREAD_VR0+(16*(n));  stvx n,b,base
#define SAVE_2VR(n,b,base)	SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
#define SAVE_4VR(n,b,base)	SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
#define SAVE_8VR(n,b,base)	SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
#define SAVE_16VR(n,b,base)	SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
#define SAVE_32VR(n,b,base)	SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
#define REST_VR(n,b,base)	li b,THREAD_VR0+(16*(n)); lvx n,b,base
#define REST_2VR(n,b,base)	REST_VR(n,b,base); REST_VR(n+1,b,base)
#define REST_4VR(n,b,base)	REST_2VR(n,b,base); REST_2VR(n+2,b,base)
#define REST_8VR(n,b,base)	REST_4VR(n,b,base); REST_4VR(n+4,b,base)
#define REST_16VR(n,b,base)	REST_8VR(n,b,base); REST_8VR(n+8,b,base)
#define REST_32VR(n,b,base)	REST_16VR(n,b,base); REST_16VR(n+16,b,base)

#define SAVE_EVR(n,s,base)	evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
#define SAVE_2EVR(n,s,base)	SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
#define SAVE_4EVR(n,s,base)	SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base)
#define SAVE_8EVR(n,s,base)	SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base)
#define SAVE_16EVR(n,s,base)	SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base)
#define SAVE_32EVR(n,s,base)	SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base)

#define REST_EVR(n,s,base)	lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
#define REST_2EVR(n,s,base)	REST_EVR(n,s,base); REST_EVR(n+1,s,base)
#define REST_4EVR(n,s,base)	REST_2EVR(n,s,base); REST_2EVR(n+2,s,base)
#define REST_8EVR(n,s,base)	REST_4EVR(n,s,base); REST_4EVR(n+4,s,base)
#define REST_16EVR(n,s,base)	REST_8EVR(n,s,base); REST_8EVR(n+8,s,base)
#define REST_32EVR(n,s,base)	REST_16EVR(n,s,base); REST_16EVR(n+16,s,base)

#ifdef CONFIG_PPC601_SYNC_FIX
#define SYNC				\
BEGIN_FTR_SECTION			\
	sync;				\
	isync;				\
END_FTR_SECTION_IFSET(CPU_FTR_601)
#define SYNC_601			\
BEGIN_FTR_SECTION			\
	sync;				\
END_FTR_SECTION_IFSET(CPU_FTR_601)
#define ISYNC_601			\
BEGIN_FTR_SECTION			\
	isync;				\
END_FTR_SECTION_IFSET(CPU_FTR_601)
#else
#define	SYNC
#define SYNC_601
#define ISYNC_601
#endif

#ifndef CONFIG_SMP
#define TLBSYNC
#else /* CONFIG_SMP */
/* tlbsync is not implemented on 601 */
#define TLBSYNC				\
BEGIN_FTR_SECTION			\
	tlbsync;			\
	sync;				\
END_FTR_SECTION_IFCLR(CPU_FTR_601)
#endif

/*
 * This instruction is not implemented on the PPC 603 or 601; however, on
 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
 * All of these instructions exist in the 8xx, they have magical powers,
 * and they must be used.
 */

#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
#define tlbia					\
	li	r4,1024;			\
	mtctr	r4;				\
	lis	r4,KERNELBASE@h;		\
0:	tlbie	r4;				\
	addi	r4,r4,0x1000;			\
	bdnz	0b
#endif

#ifdef CONFIG_BOOKE
#define tophys(rd,rs)				\
	addis	rd,rs,0

#define tovirt(rd,rs)				\
	addis	rd,rs,0

#else  /* CONFIG_BOOKE */
/*
 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
 * physical base address of RAM at compile time.
 */
#define tophys(rd,rs)				\
0:	addis	rd,rs,-KERNELBASE@h;		\
	.section ".vtop_fixup","aw";		\
	.align  1;				\
	.long   0b;				\
	.previous

#define tovirt(rd,rs)				\
0:	addis	rd,rs,KERNELBASE@h;		\
	.section ".ptov_fixup","aw";		\
	.align  1;				\
	.long   0b;				\
	.previous
#endif  /* CONFIG_BOOKE */

/*
 * On 64-bit cpus, we use the rfid instruction instead of rfi, but
 * we then have to make sure we preserve the top 32 bits except for
 * the 64-bit mode bit, which we clear.
 */
#ifdef CONFIG_PPC64BRIDGE
#define	FIX_SRR1(ra, rb)	\
	mr	rb,ra;		\
	mfmsr	ra;		\
	clrldi	ra,ra,1;		/* turn off 64-bit mode */ \
	rldimi	ra,rb,0,32
#define	RFI		.long	0x4c000024	/* rfid instruction */
#define MTMSRD(r)	.long	(0x7c000164 + ((r) << 21))	/* mtmsrd */
#define CLR_TOP32(r)	rlwinm	(r),(r),0,0,31	/* clear top 32 bits */

#else
#define FIX_SRR1(ra, rb)
#ifndef CONFIG_40x
#define	RFI		rfi
#else
#define RFI		rfi; b .	/* Prevent prefetch past rfi */
#endif
#define MTMSRD(r)	mtmsr	r
#define CLR_TOP32(r)
#endif /* CONFIG_PPC64BRIDGE */

#define RFCI		.long 0x4c000066	/* rfci instruction */
#define RFDI		.long 0x4c00004e	/* rfdi instruction */
#define RFMCI		.long 0x4c00004c	/* rfmci instruction */

#ifdef CONFIG_IBM405_ERR77
#define PPC405_ERR77(ra,rb)	dcbt	ra, rb;
#define	PPC405_ERR77_SYNC	sync;
#else
#define PPC405_ERR77(ra,rb)
#define PPC405_ERR77_SYNC
#endif

/* The boring bits... */

/* Condition Register Bit Fields */

#define	cr0	0
#define	cr1	1
#define	cr2	2
#define	cr3	3
#define	cr4	4
#define	cr5	5
#define	cr6	6
#define	cr7	7


/* General Purpose Registers (GPRs) */

#define	r0	0
#define	r1	1
#define	r2	2
#define	r3	3
#define	r4	4
#define	r5	5
#define	r6	6
#define	r7	7
#define	r8	8
#define	r9	9
#define	r10	10
#define	r11	11
#define	r12	12
#define	r13	13
#define	r14	14
#define	r15	15
#define	r16	16
#define	r17	17
#define	r18	18
#define	r19	19
#define	r20	20
#define	r21	21
#define	r22	22
#define	r23	23
#define	r24	24
#define	r25	25
#define	r26	26
#define	r27	27
#define	r28	28
#define	r29	29
#define	r30	30
#define	r31	31


/* Floating Point Registers (FPRs) */

#define	fr0	0
#define	fr1	1
#define	fr2	2
#define	fr3	3
#define	fr4	4
#define	fr5	5
#define	fr6	6
#define	fr7	7
#define	fr8	8
#define	fr9	9
#define	fr10	10
#define	fr11	11
#define	fr12	12
#define	fr13	13
#define	fr14	14
#define	fr15	15
#define	fr16	16
#define	fr17	17
#define	fr18	18
#define	fr19	19
#define	fr20	20
#define	fr21	21
#define	fr22	22
#define	fr23	23
#define	fr24	24
#define	fr25	25
#define	fr26	26
#define	fr27	27
#define	fr28	28
#define	fr29	29
#define	fr30	30
#define	fr31	31

#define	vr0	0
#define	vr1	1
#define	vr2	2
#define	vr3	3
#define	vr4	4
#define	vr5	5
#define	vr6	6
#define	vr7	7
#define	vr8	8
#define	vr9	9
#define	vr10	10
#define	vr11	11
#define	vr12	12
#define	vr13	13
#define	vr14	14
#define	vr15	15
#define	vr16	16
#define	vr17	17
#define	vr18	18
#define	vr19	19
#define	vr20	20
#define	vr21	21
#define	vr22	22
#define	vr23	23
#define	vr24	24
#define	vr25	25
#define	vr26	26
#define	vr27	27
#define	vr28	28
#define	vr29	29
#define	vr30	30
#define	vr31	31

#define	evr0	0
#define	evr1	1
#define	evr2	2
#define	evr3	3
#define	evr4	4
#define	evr5	5
#define	evr6	6
#define	evr7	7
#define	evr8	8
#define	evr9	9
#define	evr10	10
#define	evr11	11
#define	evr12	12
#define	evr13	13
#define	evr14	14
#define	evr15	15
#define	evr16	16
#define	evr17	17
#define	evr18	18
#define	evr19	19
#define	evr20	20
#define	evr21	21
#define	evr22	22
#define	evr23	23
#define	evr24	24
#define	evr25	25
#define	evr26	26
#define	evr27	27
#define	evr28	28
#define	evr29	29
#define	evr30	30
#define	evr31	31

/* some stab codes */
#define N_FUN	36
#define N_RSYM	64
#define N_SLINE	68
#define N_SO	100

#ifdef __cplusplus
} /* end of extern "C" */
#endif

#endif //_PPC_ASM_PPC_H
Commit	Line	Data
10212e41	1	/*
	2	* include/asm-ppc/ppc_asm.h
	3	*
	4	* Definitions used by various bits of low-level assembly code on PowerPC.
	5	*
	6	* Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version
	11	* 2 of the License, or (at your option) any later version.
	12	*/
	13
895ad115	14	#ifndef _PPC_ASM_PPC_H
	15	#define _PPC_ASM_PPC_H
	16
	17	#ifdef __cplusplus
	18	extern "C" {
	19	#endif
	20
10212e41	21	/*
	22	* Macros for storing registers into and loading registers from
	23	* exception frames.
	24	*/
	25	#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
	26	#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
	27	#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
	28	#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
	29	#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
	30	#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
	31	#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
	32	#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
	33	#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
	34	#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
	35
	36	#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
	37	SAVE_10GPRS(22, base)
	38	#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
	39	REST_10GPRS(22, base)
	40
	41	#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
	42	#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
	43	#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
	44	#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
	45	#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
	46	#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
	47	#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
	48	#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
	49	#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
	50	#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
	51	#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
	52	#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
	53
	54	#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
	55	#define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
	56	#define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
	57	#define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
	58	#define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
	59	#define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
	60	#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
	61	#define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
	62	#define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base)
	63	#define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base)
	64	#define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base)
	65	#define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base)
	66
	67	#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
	68	#define SAVE_2EVR(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
	69	#define SAVE_4EVR(n,s,base) SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base)
	70	#define SAVE_8EVR(n,s,base) SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base)
	71	#define SAVE_16EVR(n,s,base) SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base)
	72	#define SAVE_32EVR(n,s,base) SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base)
	73
	74	#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
	75	#define REST_2EVR(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base)
	76	#define REST_4EVR(n,s,base) REST_2EVR(n,s,base); REST_2EVR(n+2,s,base)
	77	#define REST_8EVR(n,s,base) REST_4EVR(n,s,base); REST_4EVR(n+4,s,base)
	78	#define REST_16EVR(n,s,base) REST_8EVR(n,s,base); REST_8EVR(n+8,s,base)
	79	#define REST_32EVR(n,s,base) REST_16EVR(n,s,base); REST_16EVR(n+16,s,base)
	80
	81	#ifdef CONFIG_PPC601_SYNC_FIX
	82	#define SYNC \
	83	BEGIN_FTR_SECTION \
	84	sync; \
85	isync; \
86	END_FTR_SECTION_IFSET(CPU_FTR_601)
87	#define SYNC_601 \
88	BEGIN_FTR_SECTION \
89	sync; \
90	END_FTR_SECTION_IFSET(CPU_FTR_601)
91	#define ISYNC_601 \
92	BEGIN_FTR_SECTION \
93	isync; \
94	END_FTR_SECTION_IFSET(CPU_FTR_601)
95	#else
96	#define SYNC
97	#define SYNC_601
98	#define ISYNC_601
99	#endif
100
101	#ifndef CONFIG_SMP
102	#define TLBSYNC
103	#else /* CONFIG_SMP */
104	/* tlbsync is not implemented on 601 */
105	#define TLBSYNC \
106	BEGIN_FTR_SECTION \
107	tlbsync; \
108	sync; \
109	END_FTR_SECTION_IFCLR(CPU_FTR_601)
110	#endif
111
112	/*
113	* This instruction is not implemented on the PPC 603 or 601; however, on
114	* the 403GCX and 405GP tlbia IS defined and tlbie is not.
115	* All of these instructions exist in the 8xx, they have magical powers,
116	* and they must be used.
117	*/
118
119	#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
120	#define tlbia \
121	li r4,1024; \
122	mtctr r4; \
123	lis r4,KERNELBASE@h; \
124	0: tlbie r4; \
125	addi r4,r4,0x1000; \
126	bdnz 0b
127	#endif
128
129	#ifdef CONFIG_BOOKE
130	#define tophys(rd,rs) \
131	addis rd,rs,0
132
133	#define tovirt(rd,rs) \
134	addis rd,rs,0
135
136	#else /* CONFIG_BOOKE */
137	/*
138	* On APUS (Amiga PowerPC cpu upgrade board), we don't know the
139	* physical base address of RAM at compile time.
140	*/
141	#define tophys(rd,rs) \
142	0: addis rd,rs,-KERNELBASE@h; \
143	.section ".vtop_fixup","aw"; \
144	.align 1; \
145	.long 0b; \
146	.previous
147
148	#define tovirt(rd,rs) \
149	0: addis rd,rs,KERNELBASE@h; \
150	.section ".ptov_fixup","aw"; \
151	.align 1; \
152	.long 0b; \
153	.previous
154	#endif /* CONFIG_BOOKE */
155
156	/*
157	* On 64-bit cpus, we use the rfid instruction instead of rfi, but
158	* we then have to make sure we preserve the top 32 bits except for
159	* the 64-bit mode bit, which we clear.
160	*/
161	#ifdef CONFIG_PPC64BRIDGE
162	#define FIX_SRR1(ra, rb) \
163	mr rb,ra; \
164	mfmsr ra; \
165	clrldi ra,ra,1; /* turn off 64-bit mode */ \
166	rldimi ra,rb,0,32
167	#define RFI .long 0x4c000024 /* rfid instruction */
168	#define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */
169	#define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
170
171	#else
172	#define FIX_SRR1(ra, rb)
173	#ifndef CONFIG_40x
174	#define RFI rfi
175	#else
176	#define RFI rfi; b . /* Prevent prefetch past rfi */
177	#endif
178	#define MTMSRD(r) mtmsr r
179	#define CLR_TOP32(r)
180	#endif /* CONFIG_PPC64BRIDGE */
181
182	#define RFCI .long 0x4c000066 /* rfci instruction */
183	#define RFDI .long 0x4c00004e /* rfdi instruction */
184	#define RFMCI .long 0x4c00004c /* rfmci instruction */
185
186	#ifdef CONFIG_IBM405_ERR77
187	#define PPC405_ERR77(ra,rb) dcbt ra, rb;
188	#define PPC405_ERR77_SYNC sync;
189	#else
190	#define PPC405_ERR77(ra,rb)
191	#define PPC405_ERR77_SYNC
192	#endif
193
194	/* The boring bits... */
195
196	/* Condition Register Bit Fields */
197
198	#define cr0 0
199	#define cr1 1
200	#define cr2 2
201	#define cr3 3
202	#define cr4 4
203	#define cr5 5
204	#define cr6 6
205	#define cr7 7
206
207
208	/* General Purpose Registers (GPRs) */
209
210	#define r0 0
211	#define r1 1
212	#define r2 2
213	#define r3 3
214	#define r4 4
215	#define r5 5
216	#define r6 6
217	#define r7 7
218	#define r8 8
219	#define r9 9
220	#define r10 10
221	#define r11 11
222	#define r12 12
223	#define r13 13
224	#define r14 14
225	#define r15 15
226	#define r16 16
227	#define r17 17
228	#define r18 18
229	#define r19 19
230	#define r20 20
231	#define r21 21
232	#define r22 22
233	#define r23 23
234	#define r24 24
235	#define r25 25
236	#define r26 26
237	#define r27 27
238	#define r28 28
239	#define r29 29
240	#define r30 30
241	#define r31 31
242
243
244	/* Floating Point Registers (FPRs) */
245
246	#define fr0 0
247	#define fr1 1
248	#define fr2 2
249	#define fr3 3
250	#define fr4 4
251	#define fr5 5
252	#define fr6 6
253	#define fr7 7
254	#define fr8 8
255	#define fr9 9
256	#define fr10 10
257	#define fr11 11
258	#define fr12 12
259	#define fr13 13
260	#define fr14 14
261	#define fr15 15
262	#define fr16 16
263	#define fr17 17
264	#define fr18 18
265	#define fr19 19
266	#define fr20 20
267	#define fr21 21
268	#define fr22 22
269	#define fr23 23
270	#define fr24 24
271	#define fr25 25
272	#define fr26 26
273	#define fr27 27
274	#define fr28 28
275	#define fr29 29
276	#define fr30 30
277	#define fr31 31
278
279	#define vr0 0
280	#define vr1 1
281	#define vr2 2
282	#define vr3 3
283	#define vr4 4
284	#define vr5 5
285	#define vr6 6
286	#define vr7 7
287	#define vr8 8
288	#define vr9 9
289	#define vr10 10
290	#define vr11 11
291	#define vr12 12
292	#define vr13 13
293	#define vr14 14
294	#define vr15 15
295	#define vr16 16
296	#define vr17 17
297	#define vr18 18
298	#define vr19 19
299	#define vr20 20
300	#define vr21 21
301	#define vr22 22
302	#define vr23 23
303	#define vr24 24
304	#define vr25 25
305	#define vr26 26
306	#define vr27 27
307	#define vr28 28
308	#define vr29 29
309	#define vr30 30
310	#define vr31 31
311
312	#define evr0 0
313	#define evr1 1
314	#define evr2 2
315	#define evr3 3
316	#define evr4 4
317	#define evr5 5
318	#define evr6 6
319	#define evr7 7
320	#define evr8 8
321	#define evr9 9
322	#define evr10 10
323	#define evr11 11
324	#define evr12 12
325	#define evr13 13
326	#define evr14 14
327	#define evr15 15
328	#define evr16 16
329	#define evr17 17
330	#define evr18 18
331	#define evr19 19
332	#define evr20 20
333	#define evr21 21
334	#define evr22 22
335	#define evr23 23
336	#define evr24 24
337	#define evr25 25
338	#define evr26 26
339	#define evr27 27
340	#define evr28 28
341	#define evr29 29
342	#define evr30 30
343	#define evr31 31
344
345	/* some stab codes */
346	#define N_FUN 36
347	#define N_RSYM 64
348	#define N_SLINE 68
349	#define N_SO 100
895ad115	350
	351	#ifdef __cplusplus
	352	} /* end of extern "C" */
	353	#endif
	354
	355	#endif //_PPC_ASM_PPC_H