X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=urcu.h;h=424980650474953be7c7e081ec0fe07f5e14d034;hb=6e8b8429a09800f5a50f0410f5ec4cd95b46974b;hp=fb8cedf3e15beab5ba5355b153d0bb999fa1c7fc;hpb=f4a486ac095bd844d0c18995737d589b8f085b69;p=urcu.git

diff --git a/urcu.h b/urcu.h
index fb8cedf..4249806 100644
--- a/urcu.h
+++ b/urcu.h
@@ -18,10 +18,14 @@
  */
 
 #include <stdlib.h>
+#include <pthread.h>
 
 /* The "volatile" is due to gcc bugs */
 #define barrier() __asm__ __volatile__("": : :"memory")
 
+#define likely(x)       __builtin_expect(!!(x), 1)
+#define unlikely(x)     __builtin_expect(!!(x), 0)
+
 /* x86 32/64 specific */
 #define mb()    asm volatile("mfence":::"memory")
 #define rmb()   asm volatile("lfence":::"memory")
@@ -63,7 +67,13 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
 			     : "memory");
 		break;
 	case 4:
-		asm volatile("xchgl %0,%1"
+		asm volatile("xchgl %k0,%1"
+			     : "=r" (x)
+			     : "m" (*__xg(ptr)), "0" (x)
+			     : "memory");
+		break;
+	case 8:
+		asm volatile("xchgq %0,%1"
 			     : "=r" (x)
 			     : "m" (*__xg(ptr)), "0" (x)
 			     : "memory");
@@ -109,6 +119,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
 
 #ifdef DEBUG_YIELD
 #include <sched.h>
+#include <time.h>
+#include <pthread.h>
 
 #define YIELD_READ 	(1 << 0)
 #define YIELD_WRITE	(1 << 1)
@@ -150,21 +162,26 @@ static inline void debug_yield_init(void)
 #endif
 
 /*
- * Limiting the nesting level to 256 to keep instructions small in the read
- * fast-path.
+ * The trick here is that RCU_GP_CTR_BIT must be a multiple of 8 so we can use a
+ * full 8-bits, 16-bits or 32-bits bitmask for the lower order bits.
  */
 #define RCU_GP_COUNT		(1U << 0)
-#define RCU_GP_CTR_BIT		(1U << 8)
+/* Use the amount of bits equal to half of the architecture long size */
+#define RCU_GP_CTR_BIT		(sizeof(long) << 2)
 #define RCU_GP_CTR_NEST_MASK	(RCU_GP_CTR_BIT - 1)
 
-/* Global quiescent period counter with low-order bits unused. */
-extern int urcu_gp_ctr;
+/*
+ * Global quiescent period counter with low-order bits unused.
+ * Using a int rather than a char to eliminate false register dependencies
+ * causing stalls on some architectures.
+ */
+extern long urcu_gp_ctr;
 
-extern int __thread urcu_active_readers;
+extern long __thread urcu_active_readers;
 
 static inline int rcu_old_gp_ongoing(int *value)
 {
-	int v;
+	long v;
 
 	if (value == NULL)
 		return 0;
@@ -177,12 +194,12 @@ static inline int rcu_old_gp_ongoing(int *value)
 
 static inline void rcu_read_lock(void)
 {
-	int tmp;
+	long tmp;
 
 	debug_yield_read();
 	tmp = urcu_active_readers;
 	debug_yield_read();
-	if (!(tmp & RCU_GP_CTR_NEST_MASK))
+	if (likely(!(tmp & RCU_GP_CTR_NEST_MASK)))
 		urcu_active_readers = urcu_gp_ctr + RCU_GP_COUNT;
 	else
 		urcu_active_readers = tmp + RCU_GP_COUNT;