X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=urcu.h;h=424980650474953be7c7e081ec0fe07f5e14d034;hb=6e8b8429a09800f5a50f0410f5ec4cd95b46974b;hp=2aa35977036d9432884206983c21b6bc686b9cf0;hpb=cf380c2fd2f85e3fba4826991fb748255bdc9b76;p=urcu.git diff --git a/urcu.h b/urcu.h index 2aa3597..4249806 100644 --- a/urcu.h +++ b/urcu.h @@ -17,9 +17,15 @@ * Distributed under GPLv2 */ +#include +#include + /* The "volatile" is due to gcc bugs */ #define barrier() __asm__ __volatile__("": : :"memory") +#define likely(x) __builtin_expect(!!(x), 1) +#define unlikely(x) __builtin_expect(!!(x), 0) + /* x86 32/64 specific */ #define mb() asm volatile("mfence":::"memory") #define rmb() asm volatile("lfence":::"memory") @@ -31,6 +37,51 @@ static inline void atomic_inc(int *v) : "+m" (*v)); } +#define xchg(ptr, v) \ + ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr)))) + +struct __xchg_dummy { + unsigned long a[100]; +}; +#define __xg(x) ((struct __xchg_dummy *)(x)) + +/* + * Note: no "lock" prefix even on SMP: xchg always implies lock anyway + * Note 2: xchg has side effect, so that attribute volatile is necessary, + * but generally the primitive is invalid, *ptr is output argument. --ANK + */ +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, + int size) +{ + switch (size) { + case 1: + asm volatile("xchgb %b0,%1" + : "=q" (x) + : "m" (*__xg(ptr)), "0" (x) + : "memory"); + break; + case 2: + asm volatile("xchgw %w0,%1" + : "=r" (x) + : "m" (*__xg(ptr)), "0" (x) + : "memory"); + break; + case 4: + asm volatile("xchgl %k0,%1" + : "=r" (x) + : "m" (*__xg(ptr)), "0" (x) + : "memory"); + break; + case 8: + asm volatile("xchgq %0,%1" + : "=r" (x) + : "m" (*__xg(ptr)), "0" (x) + : "memory"); + break; + } + return x; +} + /* Nop everywhere except on alpha. */ #define smp_read_barrier_depends() @@ -68,22 +119,32 @@ static inline void atomic_inc(int *v) #ifdef DEBUG_YIELD #include +#include +#include #define YIELD_READ (1 << 0) #define YIELD_WRITE (1 << 1) -extern int yield_active; +extern unsigned int yield_active; +extern unsigned int __thread rand_yield; static inline void debug_yield_read(void) { if (yield_active & YIELD_READ) - sched_yield(); + if (rand_r(&rand_yield) & 0x1) + sched_yield(); } static inline void debug_yield_write(void) { if (yield_active & YIELD_WRITE) - sched_yield(); + if (rand_r(&rand_yield) & 0x1) + sched_yield(); +} + +static inline void debug_yield_init(void) +{ + rand_yield = time(NULL) ^ pthread_self(); } #else static inline void debug_yield_read(void) @@ -92,28 +153,56 @@ static inline void debug_yield_read(void) static inline void debug_yield_write(void) { +} + +static inline void debug_yield_init(void) +{ + } #endif -/* Global quiescent period parity */ -extern int urcu_qparity; +/* + * The trick here is that RCU_GP_CTR_BIT must be a multiple of 8 so we can use a + * full 8-bits, 16-bits or 32-bits bitmask for the lower order bits. + */ +#define RCU_GP_COUNT (1U << 0) +/* Use the amount of bits equal to half of the architecture long size */ +#define RCU_GP_CTR_BIT (sizeof(long) << 2) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) -extern int __thread urcu_active_readers[2]; +/* + * Global quiescent period counter with low-order bits unused. + * Using a int rather than a char to eliminate false register dependencies + * causing stalls on some architectures. + */ +extern long urcu_gp_ctr; + +extern long __thread urcu_active_readers; -static inline int get_urcu_qparity(void) +static inline int rcu_old_gp_ongoing(int *value) { - return urcu_qparity; + long v; + + if (value == NULL) + return 0; + debug_yield_write(); + v = ACCESS_ONCE(*value); + debug_yield_write(); + return (v & RCU_GP_CTR_NEST_MASK) && + ((v ^ ACCESS_ONCE(urcu_gp_ctr)) & RCU_GP_CTR_BIT); } -/* - * urcu_parity should be declared on the caller's stack. - */ -static inline void rcu_read_lock(int *urcu_parity) +static inline void rcu_read_lock(void) { + long tmp; + debug_yield_read(); - *urcu_parity = get_urcu_qparity(); + tmp = urcu_active_readers; debug_yield_read(); - urcu_active_readers[*urcu_parity]++; + if (likely(!(tmp & RCU_GP_CTR_NEST_MASK))) + urcu_active_readers = urcu_gp_ctr + RCU_GP_COUNT; + else + urcu_active_readers = tmp + RCU_GP_COUNT; debug_yield_read(); /* * Increment active readers count before accessing the pointer. @@ -123,7 +212,7 @@ static inline void rcu_read_lock(int *urcu_parity) debug_yield_read(); } -static inline void rcu_read_unlock(int *urcu_parity) +static inline void rcu_read_unlock(void) { debug_yield_read(); barrier(); @@ -132,11 +221,53 @@ static inline void rcu_read_unlock(int *urcu_parity) * Finish using rcu before decrementing the pointer. * See force_mb_all_threads(). */ - urcu_active_readers[*urcu_parity]--; + urcu_active_readers -= RCU_GP_COUNT; debug_yield_read(); } -extern void *urcu_publish_content(void **ptr, void *new); +/** + * rcu_assign_pointer - assign (publicize) a pointer to a newly + * initialized structure that will be dereferenced by RCU read-side + * critical sections. Returns the value assigned. + * + * Inserts memory barriers on architectures that require them + * (pretty much all of them other than x86), and also prevents + * the compiler from reordering the code that initializes the + * structure after the pointer assignment. More importantly, this + * call documents which pointers will be dereferenced by RCU read-side + * code. + */ + +#define rcu_assign_pointer(p, v) \ + ({ \ + if (!__builtin_constant_p(v) || \ + ((v) != NULL)) \ + wmb(); \ + (p) = (v); \ + }) + +#define rcu_xchg_pointer(p, v) \ + ({ \ + if (!__builtin_constant_p(v) || \ + ((v) != NULL)) \ + wmb(); \ + xchg(p, v); \ + }) + +extern void synchronize_rcu(void); + +/* + * Exchanges the pointer and waits for quiescent state. + * The pointer returned can be freed. + */ +#define urcu_publish_content(p, v) \ + ({ \ + void *oldptr; \ + debug_yield_write(); \ + oldptr = rcu_xchg_pointer(p, v); \ + synchronize_rcu(); \ + oldptr; \ + }) /* * Reader thread registration.