X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=urcu%2Fuatomic_arch_ppc.h;h=2322c97f43fe8f6a5b0f99daf59de871d08ccc80;hb=94b7b9d25402e563a44651e65a29c88d41255bca;hp=08a622dfe6f93cd547b0684ebfd398bf9284fe92;hpb=b46b23cb9949c585ddf8ccb691458c8c7c60c7ad;p=urcu.git

diff --git a/urcu/uatomic_arch_ppc.h b/urcu/uatomic_arch_ppc.h
index 08a622d..2322c97 100644
--- a/urcu/uatomic_arch_ppc.h
+++ b/urcu/uatomic_arch_ppc.h
@@ -23,6 +23,10 @@
 #include <urcu/compiler.h>
 #include <urcu/system.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif 
+
 #ifndef __SIZEOF_LONG__
 #ifdef __powerpc64__
 #define __SIZEOF_LONG__ 8
@@ -31,6 +35,12 @@
 #endif
 #endif
 
+#ifdef __NO_LWSYNC__
+#define LWSYNC_OPCODE	"sync\n"
+#else
+#define LWSYNC_OPCODE	"lwsync\n"
+#endif
+
 #ifndef BITS_PER_LONG
 #define BITS_PER_LONG	(__SIZEOF_LONG__ * 8)
 #endif
@@ -58,7 +68,7 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
 		unsigned int result;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"lwarx %0,0,%1\n"	/* load and reserve */
 			"stwcx. %2,0,%1\n"	/* else store conditional */
 			"bne- 1b\n"	 	/* retry if lost reservation */
@@ -75,7 +85,7 @@ unsigned long _uatomic_exchange(void *addr, unsigned long val, int len)
 		unsigned long result;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"ldarx %0,0,%1\n"	/* load and reserve */
 			"stdcx. %2,0,%1\n"	/* else store conditional */
 			"bne- 1b\n"	 	/* retry if lost reservation */
@@ -109,7 +119,7 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
 		unsigned int old_val;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"lwarx %0,0,%1\n"	/* load and reserve */
 			"cmpd %0,%3\n"		/* if load is not equal to */
 			"bne 2f\n"		/* old, fail */
@@ -130,7 +140,7 @@ unsigned long _uatomic_cmpxchg(void *addr, unsigned long old,
 		unsigned long old_val;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"ldarx %0,0,%1\n"	/* load and reserve */
 			"cmpd %0,%3\n"		/* if load is not equal to */
 			"bne 2f\n"		/* old, fail */
@@ -171,7 +181,7 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
 		unsigned int result;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"lwarx %0,0,%1\n"	/* load and reserve */
 			"add %0,%2,%0\n"	/* add val to value loaded */
 			"stwcx. %0,0,%1\n"	/* store conditional */
@@ -189,7 +199,7 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
 		unsigned long result;
 
 		__asm__ __volatile__(
-			"lwsync\n"
+			LWSYNC_OPCODE
 		"1:\t"	"ldarx %0,0,%1\n"	/* load and reserve */
 			"add %0,%2,%0\n"	/* add val to value loaded */
 			"stdcx. %0,0,%1\n"	/* store conditional */
@@ -225,7 +235,10 @@ unsigned long _uatomic_add_return(void *addr, unsigned long val,
 #define uatomic_inc(addr)		uatomic_add((addr), 1)
 #define uatomic_dec(addr)		uatomic_add((addr), -1)
 
-#define URCU_CAS_AVAIL()	1
 #define compat_uatomic_cmpxchg(ptr, old, _new)	uatomic_cmpxchg(ptr, old, _new)
 
+#ifdef __cplusplus 
+}
+#endif
+
 #endif /* _URCU_ARCH_UATOMIC_PPC_H */