X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=tests%2Ftest_rwlock_timing.c;h=c5c947895458d19311f8ff8774f8579cfc521fc7;hb=40646e1ec30a2fa5d289175643c1d1343e2f9b77;hp=b26f83dcc9035c20ea878896bc8b1477eaa64a76;hpb=ec4e58a3aba2084440012f8ccac3a31eb6101183;p=urcu.git diff --git a/tests/test_rwlock_timing.c b/tests/test_rwlock_timing.c index b26f83d..c5c9478 100644 --- a/tests/test_rwlock_timing.c +++ b/tests/test_rwlock_timing.c @@ -33,9 +33,6 @@ #include #include -/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */ -#define CACHE_LINE_SIZE 4096 - #if defined(_syscall0) _syscall0(pid_t, gettid) #elif defined(__NR_gettid)