X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=tests%2Ftest_qsbr_gc.c;h=97660676e548f08d55cc7b3aadf51c066c03338d;hb=40646e1ec30a2fa5d289175643c1d1343e2f9b77;hp=004672db12a16ff777a38cb789821e852f7a15ce;hpb=833dbdb633ba44bfb71b4b965a83096d8e4e827b;p=urcu.git

diff --git a/tests/test_qsbr_gc.c b/tests/test_qsbr_gc.c
index 004672d..9766067 100644
--- a/tests/test_qsbr_gc.c
+++ b/tests/test_qsbr_gc.c
@@ -33,10 +33,7 @@
 #include <sys/syscall.h>
 #include <sched.h>
 
-#include "../arch.h"
-
-/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
-#define CACHE_LINE_SIZE 4096
+#include <urcu/arch.h>
 
 /* hardcoded number of CPUs */
 #define NR_CPUS 16384
@@ -57,7 +54,7 @@ static inline pid_t gettid(void)
 #endif
 
 #define _LGPL_SOURCE
-#include "../urcu-qsbr.h"
+#include <urcu-qsbr.h>
 
 struct test_array {
 	int a;