X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=include%2Furcu%2Fuatomic%2Friscv.h;h=93131909628a5d66c0d6b527c08e237a195b6f9a;hb=d3d3857f678627e7bbfb5a8d6f3bc15cd2a694d9;hp=a6700e17e2429567fbe1e4e95117bf0c69c7c0f0;hpb=d001c88633f6a58e94eb73f4814976d13f61bd77;p=userspace-rcu.git

diff --git a/include/urcu/uatomic/riscv.h b/include/urcu/uatomic/riscv.h
index a6700e1..9313190 100644
--- a/include/urcu/uatomic/riscv.h
+++ b/include/urcu/uatomic/riscv.h
@@ -1,25 +1,9 @@
+// SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com>
+//
+// SPDX-License-Identifier: MIT
+
 /*
  * Atomic exchange operations for the RISC-V architecture. Let GCC do it.
- *
- * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
  */
 
 #ifndef _URCU_ARCH_UATOMIC_RISCV_H