X-Git-Url: https://git.lttng.org/?a=blobdiff_plain;f=arch_atomic_ppc.h;h=4440a56648d2f6914187473945cf634fdc09047f;hb=6ee91d83a7a5b33160158f57f94dd75e6d0a67ed;hp=231a57798598e3da844d6938a95d9502b402da86;hpb=f689dcbc075f17e1382bc560ce41b273173a9f46;p=urcu.git

diff --git a/arch_atomic_ppc.h b/arch_atomic_ppc.h
index 231a577..4440a56 100644
--- a/arch_atomic_ppc.h
+++ b/arch_atomic_ppc.h
@@ -36,6 +36,13 @@
 
 #ifndef _INCLUDE_API_H
 
+#define atomic_set(addr, v)				\
+do {							\
+	ACCESS_ONCE(*(addr)) = (v);			\
+} while (0)
+
+#define atomic_read(addr)	ACCESS_ONCE(*(addr))
+
 /*
  * Using a isync as second barrier for exchange to provide acquire semantic.
  * According to atomic_ops/sysdeps/gcc/powerpc.h, the documentation is "fairly
@@ -45,8 +52,8 @@
 
 /* xchg */
 
-static __attribute__((always_inline))
-unsigned long _atomic_exchange(volatile void *addr, unsigned long val, int len)
+static inline __attribute__((always_inline))
+unsigned long _atomic_exchange(void *addr, unsigned long val, int len)
 {
 	switch (len) {
 	case 4:
@@ -90,13 +97,13 @@ unsigned long _atomic_exchange(volatile void *addr, unsigned long val, int len)
 	return 0;
 }
 
-#define xchg(addr, v)	(__typeof__(*(addr))) _atomic_exchange((addr), (v), \
-							    sizeof(*(addr)))
-
+#define xchg(addr, v)							    \
+	((__typeof__(*(addr))) _atomic_exchange((addr), (unsigned long)(v), \
+						sizeof(*(addr))))
 /* cmpxchg */
 
-static __attribute__((always_inline))
-unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
+static inline __attribute__((always_inline))
+unsigned long _atomic_cmpxchg(void *addr, unsigned long old,
 			      unsigned long _new, int len)
 {
 	switch (len) {
@@ -113,7 +120,7 @@ unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
 			"bne- 1b\n"	 	/* retry if lost reservation */
 			"isync\n"
 		"2:\n"
-				: "=&r"(old_val),
+				: "=&r"(old_val)
 				: "r"(addr), "r"((unsigned int)_new),
 				  "r"((unsigned int)old)
 				: "memory", "cc");
@@ -149,14 +156,16 @@ unsigned long _atomic_cmpxchg(volatile void *addr, unsigned long old,
 	return 0;
 }
 
-#define cmpxchg(addr, old, _new)					\
-	(__typeof__(*(addr))) _atomic_cmpxchg((addr), (old), (_new),	\
-					      sizeof(*(addr)))
+
+#define cmpxchg(addr, old, _new)					    \
+	((__typeof__(*(addr))) _atomic_cmpxchg((addr), (unsigned long)(old),\
+						(unsigned long)(_new), 	    \
+						sizeof(*(addr))))
 
 /* atomic_add_return */
 
-static __attribute__((always_inline))
-unsigned long _atomic_add_return(volatile void *addr, unsigned long val,
+static inline __attribute__((always_inline))
+unsigned long _atomic_add_return(void *addr, unsigned long val,
 				 int len)
 {
 	switch (len) {
@@ -203,8 +212,11 @@ unsigned long _atomic_add_return(volatile void *addr, unsigned long val,
 	return 0;
 }
 
-#define atomic_add_return(addr, v)	\
-	(__typeof__(*(addr))) _atomic_add((addr), (v), sizeof(*(addr)))
+
+#define atomic_add_return(addr, v)					\
+	((__typeof__(*(addr))) _atomic_add_return((addr),		\
+						  (unsigned long)(v),	\
+						  sizeof(*(addr))))
 
 /* atomic_sub_return, atomic_add, atomic_sub, atomic_inc, atomic_dec */
 
@@ -213,8 +225,8 @@ unsigned long _atomic_add_return(volatile void *addr, unsigned long val,
 #define atomic_add(addr, v)		(void)atomic_add_return((addr), (v))
 #define atomic_sub(addr, v)		(void)atomic_sub_return((addr), (v))
 
-#define atomic_inc(addr, v)		atomic_add((addr), 1)
-#define atomic_dec(addr, v)		atomic_add((addr), -1)
+#define atomic_inc(addr)		atomic_add((addr), 1)
+#define atomic_dec(addr)		atomic_add((addr), -1)
 
 #endif /* #ifndef _INCLUDE_API_H */