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[lttv.git] / markers-test / test-mark-speed-edit.c

diff --git a/markers-test/test-mark-speed-edit.c b/markers-test/test-mark-speed-edit.c
index 62558917238e1ef4b72ed97550192a59f1edcf9c..dbb72faa4daf75d79ab21281b6112299355a3d60 100644 (file)
--- a/markers-test/test-mark-speed-edit.c
+++ b/markers-test/test-mark-speed-edit.c
@@ -8,11 +8,48 @@
 #include <linux/timex.h>
 #include <linux/marker.h>
 #include <asm/ptrace.h>
+#include <asm/system.h>
+
+static void pmc_flush_cache(void)
+  {
+    register int i;
+    /* write back and invalidate cache (a serializing instruction) */
+
+    __asm__ __volatile__ ( "wbinvd" : : : "memory" );
+
+    /* The wbinvd instruction does not wait for the external caches
+     * to be flushed, but only requests that it be done.  The loop
+     * is to be sure that enough time has elapsed, but the compiler
+     * might simplify or even remove it.  The loop bound is for a
+     * 512 KB L2 cache.  On a Pentium Pro/II/III, the loop uses
+     * 2 cycles per iteration.
+     *
+     * Does wbinvd also cause the TLB to be flushed?
+     * A comment in mtrr.c suggests that it does.
+     */
+    
+     for (i = 0; i < 512*1024; i++) {
+       cpu_relax();
+     }
+  }
+
+
+
 static void noinline test2(const struct marker *mdata,
         void *call_private, ...)
 {
+       unsigned char *ins = __builtin_return_address(0) - 5;
+#if 0
        /* not called */
-       printk("blah\n");
+       printk("ip %p\n", __builtin_return_address(0));
+       printk("prev_ins %hX %hX %hX %hX %hX\n",
+               ins[0], ins[1], ins[2], ins[3], ins[4]);
+#endif //0
+       ins[0] = 0x90;
+       ins[1] = 0x8d;
+       ins[2] = 0x74;
+       ins[3] = 0x26;
+       ins[4] = 0x00;
 }
 
 /*
@@ -52,9 +89,20 @@ struct proc_dir_entry *pentry = NULL;
 
 static inline void test(unsigned long arg, unsigned long arg2)
 {
+       volatile int temp[5];
+#ifdef CACHEFLUSH
+       clflush(&current->pid);
+       //pmc_flush_cache();
+#endif
+       temp[2] = (temp[0] + 60) << 10;
+       temp[3] = (temp[2] + 60) << 10;
+       temp[4] = (temp[3] + 60) << 10;
+       temp[0] = (temp[4] + 60) << 10;
        //asm volatile ("");
        //__my_trace_mark(1, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2);
+       barrier();
        test2(NULL, NULL, 2, current->pid, arg, arg2);
+       barrier();
        //__my_trace_mark(0, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2);
 }
 
@@ -65,10 +113,23 @@ static int my_open(struct inode *inode, struct file *file)
        unsigned long flags;
 
        local_irq_save(flags);
+#ifdef CACHEFLUSH
+       //pmc_flush_cache();    /* initial write back, without cycle count */
+       //msleep(20);   /* wait for L2 flush */
+#endif
        rdtsc_barrier();
        cycles1 = get_cycles();
        rdtsc_barrier();
-       for(i=0; i<20000; i++) {
+       for(i=0; i<2000; i++) {
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
+               test(i, i);
                test(i, i);
        }
        rdtsc_barrier();
@@ -101,4 +162,5 @@ void cleanup_module(void)
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Mathieu Desnoyers");
 MODULE_DESCRIPTION("Marker Test");
+MODULE_VERSION("1.0");