LoongArch: Document that byte and short atomics are implemented with LL/SC
[urcu.git] / include / urcu / uatomic / loongarch.h
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1#ifndef _URCU_UATOMIC_ARCH_LOONGARCH_H
2#define _URCU_UATOMIC_ARCH_LOONGARCH_H
3
4/*
5 * Atomic exchange operations for the LoongArch architecture. Let GCC do it.
6 *
7 * Copyright (c) 2021 Wang Jing <wangjing@loongson.cn>
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to
11 * deal in the Software without restriction, including without limitation the
12 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
13 * sell copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28#include <urcu/compiler.h>
29#include <urcu/system.h>
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
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35/*
36 * LoongArch implements byte and short atomics with LL/SC instructions,
37 * which retry if the cache line is modified concurrently between LL and
38 * SC.
39 */
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40#define UATOMIC_HAS_ATOMIC_BYTE
41#define UATOMIC_HAS_ATOMIC_SHORT
42
43#ifdef __cplusplus
44}
45#endif
46
47#include <urcu/uatomic/generic.h>
48
49#endif /* _URCU_UATOMIC_ARCH_LOONGARCH_H */
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