X-Git-Url: http://git.lttng.org/?a=blobdiff_plain;f=include%2Fust%2Fprocessor.h;h=867b140cce9b2d408f594f770ac688da86f5702c;hb=12e81b07455a1aef2e2bcc73004f14a7b73596fa;hp=95e1164af5ad2085527ddaf8d4579c0708fb8bf7;hpb=9692fa182535c55f0a03f79f26211aed9906da82;p=ust.git

diff --git a/include/ust/processor.h b/include/ust/processor.h
index 95e1164..867b140 100644
--- a/include/ust/processor.h
+++ b/include/ust/processor.h
@@ -1,3 +1,20 @@
+/* Copyright (C) 2009  Pierre-Marc Fournier
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #ifndef UST_PROCESSOR_H
 #define UST_PROCESSOR_H
 
@@ -7,7 +24,7 @@
 extern __thread long ust_reg_stack[500];
 extern volatile __thread long *ust_reg_stack_ptr;
 
-#ifndef __x86_64
+#ifdef __i386
 
 struct registers {
 	short ss;
@@ -23,6 +40,15 @@ struct registers {
 	long esp;
 };
 
+static inline int fls(int x)
+{
+        int r;
+        asm("bsrl %1,%0\n\t"
+            "cmovzl %2,%0"
+            : "=&r" (r) : "rm" (x), "rm" (-1));
+        return r + 1;
+}
+
 #ifdef CONFIG_UST_GDB_INTEGRATION
 
 /* save_registers - saves most of the processor's registers so
@@ -181,11 +207,13 @@ struct registers {
 
 #define RELATIVE_ADDRESS(__rel_label__) __rel_label__
 
-#define ARCH_COPY_ADDR(src, dst) "lea " src "," dst
+#define ARCH_COPY_ADDR(dst) "lea 2b," dst "\n\t"
 
 #define _ASM_PTR ".long "
 
-#else /* below is code for x86-64 */
+#endif /* below is code for x86-64 */
+
+#ifdef __x86_64
 
 struct registers {
 	int padding; /* 4 bytes */
@@ -210,6 +238,15 @@ struct registers {
 	unsigned long rsp;
 };
 
+static inline int fls(int x)
+{
+        int r;
+        asm("bsrl %1,%0\n\t"
+            "cmovzl %2,%0"
+            : "=&r" (r) : "rm" (x), "rm" (-1));
+        return r + 1;
+}
+
 #ifdef CONFIG_UST_GDB_INTEGRATION
 
 #define save_registers(regsptr) \
@@ -381,10 +418,32 @@ struct registers {
  * in a relocatable way. On x86-64, this uses a special (%rip) notation. */
 #define RELATIVE_ADDRESS(__rel_label__) __rel_label__(%%rip)
 
-#define ARCH_COPY_ADDR(src, dst) "lea " src "(%%rip)," dst
+#define ARCH_COPY_ADDR(dst) "lea 2b(%%rip)," dst "\n\t"
 
 #define _ASM_PTR ".quad "
 
-#endif
+#endif /* x86_64 */
+
+#ifdef __PPC__
+
+struct registers {
+};
+
+static __inline__ int fls(unsigned int x)
+{
+        int lz;
+
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
+        return 32 - lz;
+}
+
+#define ARCH_COPY_ADDR(dst) \
+		     "lis " dst ",2b@h\n\t" /* load high bytes */ \
+		     "ori " dst "," dst ",2b@l\n\t" /* load low bytes */
+
+#define _ASM_PTR ".long "
+#define save_registers(a)
+
+#endif /* __PPC__ */
 
 #endif /* UST_PROCESSOR_H */