X-Git-Url: http://git.lttng.org/?a=blobdiff_plain;f=include%2Furcu%2Fuatomic%2Friscv.h;h=a70ea25e107c04f2b2db371caee06243bfdbba7c;hb=46980605309e922d14f646c6705d184cb674c0f7;hp=a6700e17e2429567fbe1e4e95117bf0c69c7c0f0;hpb=fdfad81006c2c964781b616f0a75578507be809c;p=urcu.git diff --git a/include/urcu/uatomic/riscv.h b/include/urcu/uatomic/riscv.h index a6700e1..a70ea25 100644 --- a/include/urcu/uatomic/riscv.h +++ b/include/urcu/uatomic/riscv.h @@ -1,26 +1,29 @@ +// SPDX-FileCopyrightText: 2018 Michael Jeanson +// +// SPDX-License-Identifier: MIT + /* - * Atomic exchange operations for the RISC-V architecture. Let GCC do it. - * - * Copyright (c) 2018 Michael Jeanson + * Atomic exchange operations for the RISC-V architecture. * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: + * Let the compiler do it. + */ + +/* + * See for details. * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * Until the following patches are backported, Userspace RCU is broken for the + * RISC-V architecture when compiled with GCC. * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * - + * - + * - */ +#if defined(__GNUC__) +# error "Implementations of some atomic operations of GCC for RISC-V \ + are insufficient for sequential consistency. For this reason \ + Userspace RCU is currently marked as 'broken' for RISC-V with \ + GCC. However, it is still possible to use other toolchains." +#endif #ifndef _URCU_ARCH_UATOMIC_RISCV_H #define _URCU_ARCH_UATOMIC_RISCV_H