#include <sys/syscall.h>
#include <sched.h>
-#include "../arch.h"
+#include <urcu/arch.h>
/* Make this big enough to include the POWER5+ L3 cacheline size of 256B */
#define CACHE_LINE_SIZE 4096
#endif
#define _LGPL_SOURCE
-#include "../urcu-qsbr.h"
+#include <urcu-qsbr.h>
struct test_array {
int a;