move everything out of trunk

[lttv.git] / markers-test / test-mark-speed-local.c

diff --git a/markers-test/test-mark-speed-local.c b/markers-test/test-mark-speed-local.c
index 249ae5662c070ced8668b1a7b17c4f2e3c048399..1940cdc36e3a1f8b05ee2de227acbc00aafa1b8a 100644 (file)
--- a/markers-test/test-mark-speed-local.c
+++ b/markers-test/test-mark-speed-local.c
@@ -12,6 +12,7 @@
 
 static void pmc_flush_cache(void)
   {
+    register int i;
     /* write back and invalidate cache (a serializing instruction) */
 
     __asm__ __volatile__ ( "wbinvd" : : : "memory" );
@@ -26,7 +27,9 @@ static void pmc_flush_cache(void)
      * Does wbinvd also cause the TLB to be flushed?
      * A comment in mtrr.c suggests that it does.
      */
-    { register int i; for (i = 0; i < 512*1024; i++) { } }
+    for (i = 0; i < 512*1024; i++) {
+      cpu_relax();
+    }
   }
 
 
@@ -83,9 +86,10 @@ struct proc_dir_entry *pentry = NULL;
 
 static inline void test(unsigned long arg, unsigned long arg2)
 {
-       int temp[5];
+       volatile int temp[5];
 #ifdef CACHEFLUSH
-       pmc_flush_cache();
+       clflush(&current->pid);
+       //pmc_flush_cache();
 #endif
        temp[2] = (temp[0] + 60) << 10;
        temp[3] = (temp[2] + 60) << 10;
@@ -107,8 +111,8 @@ static int my_open(struct inode *inode, struct file *file)
 
        local_irq_save(flags);
 #ifdef CACHEFLUSH
-       pmc_flush_cache();      /* initial write back, without cycle count */
-       msleep(20);     /* wait for L2 flush */
+       //pmc_flush_cache();    /* initial write back, without cycle count */
+       //msleep(20);   /* wait for L2 flush */
 #endif
        rdtsc_barrier();
        cycles1 = get_cycles();