-/* The "volatile" is due to gcc bugs */
-#define barrier() __asm__ __volatile__("": : :"memory")
-
-#define likely(x) __builtin_expect(!!(x), 1)
-#define unlikely(x) __builtin_expect(!!(x), 0)
-
-/* Assume SMP machine, given we don't have this information */
-#define CONFIG_SMP 1
-
-
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_mc() mc()
-#define smp_rmc() rmc()
-#define smp_wmc() wmc()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_mc() barrier()
-#define smp_rmc() barrier()
-#define smp_wmc() barrier()
-#endif
-
-#include "arch.h"
-
-/* Nop everywhere except on alpha. */
-#define smp_read_barrier_depends()
-
-/*
- * Prevent the compiler from merging or refetching accesses. The compiler
- * is also forbidden from reordering successive instances of ACCESS_ONCE(),
- * but only when the compiler is aware of some particular ordering. One way
- * to make the compiler aware of ordering is to put the two invocations of
- * ACCESS_ONCE() in different C statements.
- *
- * This macro does absolutely -nothing- to prevent the CPU from reordering,
- * merging, or refetching absolutely anything at any time. Its main intended
- * use is to mediate communication between process-level code and irq/NMI
- * handlers, all running on the same CPU.
- */
-#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
-
-/*
- * Identify a shared load. A smp_rmc() or smp_mc() should come before the load.
- */
-#define _LOAD_SHARED(p) ACCESS_ONCE(p)
-
-/*
- * Load a data from shared memory, doing a cache flush if required.
- */
-#define LOAD_SHARED(p) \
- ({ \
- smp_rmc(); \
- _LOAD_SHARED(p); \
- })
-
-
-/*
- * Identify a shared store. A smp_wmc() or smp_mc() should follow the store.
- */
-#define _STORE_SHARED(x, v) \
- do { \
- ACCESS_ONCE(x) = (v); \
- } while (0)
-