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Use gcc atomics on aarch64/powerpc64le
[urcu.git]
/
configure.ac
diff --git
a/configure.ac
b/configure.ac
index 774094e0ba4b935f5f2b59a3dfb432434b62633a..3368b33610e8754f51d2cf3f42cc3b2cf36eb7bb 100644
(file)
--- a/
configure.ac
+++ b/
configure.ac
@@
-69,6
+69,7
@@
AS_CASE([$host_cpu],
[powerpc], [ARCHTYPE="ppc"],
[ppc64], [ARCHTYPE="ppc"],
[powerpc64], [ARCHTYPE="ppc"],
[powerpc], [ARCHTYPE="ppc"],
[ppc64], [ARCHTYPE="ppc"],
[powerpc64], [ARCHTYPE="ppc"],
+ [powerpc64le], [ARCHTYPE="gcc"],
[ppc], [ARCHTYPE="ppc"],
[s390], [ARCHTYPE="s390"],
[s390x], [ARCHTYPE="s390"],
[ppc], [ARCHTYPE="ppc"],
[s390], [ARCHTYPE="s390"],
[s390x], [ARCHTYPE="s390"],
@@
-77,6
+78,7
@@
AS_CASE([$host_cpu],
[alpha*], [ARCHTYPE="alpha"],
[ia64], [ARCHTYPE="gcc"],
[arm*], [ARCHTYPE="arm"],
[alpha*], [ARCHTYPE="alpha"],
[ia64], [ARCHTYPE="gcc"],
[arm*], [ARCHTYPE="arm"],
+ [aarch64], [ARCHTYPE="gcc"],
[mips*], [ARCHTYPE="mips"],
[tile*], [ARCHTYPE="gcc"],
[ARCHTYPE="unknown"]
[mips*], [ARCHTYPE="mips"],
[tile*], [ARCHTYPE="gcc"],
[ARCHTYPE="unknown"]
@@
-140,7
+142,10
@@
AS_IF([test "x$ARCHTYPE" = "xx86"],[
#For now, using lock; addl compatibility mode even for i686, because the
#Pentium III is seen as a i686, but lacks mfence instruction.
#Only using fence for x86_64.
#For now, using lock; addl compatibility mode even for i686, because the
#Pentium III is seen as a i686, but lacks mfence instruction.
#Only using fence for x86_64.
- AS_IF([test "x$host_cpu" != "xi386" -a "x$host_cpu" != "xi486" -a "x$host_cpu" != "xi586" -a "x$host_cpu" != "xi686"],[
+ #
+ #k1om is the name for the Intel MIC family (Xeon Phi). It is an x86_64
+ #variant but lacks fence instructions.
+ AS_IF([test "x$host_cpu" != "xi386" -a "x$host_cpu" != "xi486" -a "x$host_cpu" != "xi586" -a "x$host_cpu" != "xi686" -a "x$host_vendor" != "xk1om"],[
AC_MSG_RESULT([yes])
AC_DEFINE([CONFIG_RCU_HAVE_FENCE], [1])
],[
AC_MSG_RESULT([yes])
AC_DEFINE([CONFIG_RCU_HAVE_FENCE], [1])
],[
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