include/urcu/arch/x86.h

   1 #ifndef _URCU_ARCH_X86_H
   2 #define _URCU_ARCH_X86_H
   3
   4 /*
   5  * arch_x86.h: trivial definitions for the x86 architecture.
   6  *
   7  * Copyright (c) 2009 Paul E. McKenney, IBM Corporation.
   8  * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
   9  *
  10  * This library is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU Lesser General Public
  12  * License as published by the Free Software Foundation; either
  13  * version 2.1 of the License, or (at your option) any later version.
  14  *
  15  * This library is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * Lesser General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU Lesser General Public
  21  * License along with this library; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  23  */
  24
  25 #include <urcu/compiler.h>
  26 #include <urcu/config.h>
  27 #include <urcu/syscall-compat.h>
  28 #include <stdint.h>
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #define CAA_CACHE_LINE_SIZE     128
  35
  36 /*
  37  * For now, using lock; addl compatibility mode even for i686, because the
  38  * Pentium III is seen as a i686, but lacks mfence instruction.  Only using
  39  * fence for x86_64.
  40  *
  41  * k1om (__MIC__) is the name for the Intel MIC family (Xeon Phi). It is an
  42  * x86_64 variant but lacks fence instructions.
  43  */
  44 #if (defined(URCU_ARCH_AMD64) && !defined(URCU_ARCH_K1OM))
  45
  46 /* For backwards compat */
  47 #define CONFIG_RCU_HAVE_FENCE 1
  48
  49 #define cmm_mb()    __asm__ __volatile__ ("mfence":::"memory")
  50
  51 /*
  52  * Define cmm_rmb/cmm_wmb to "strict" barriers that may be needed when
  53  * using SSE or working with I/O areas.  cmm_smp_rmb/cmm_smp_wmb are
  54  * only compiler barriers, which is enough for general use.
  55  */
  56 #define cmm_rmb()     __asm__ __volatile__ ("lfence":::"memory")
  57 #define cmm_wmb()     __asm__ __volatile__ ("sfence"::: "memory")
  58 #define cmm_smp_rmb() cmm_barrier()
  59 #define cmm_smp_wmb() cmm_barrier()
  60
  61 #else
  62
  63 /*
  64  * We leave smp_rmb/smp_wmb as full barriers for processors that do not have
  65  * fence instructions.
  66  *
  67  * An empty cmm_smp_rmb() may not be enough on old PentiumPro multiprocessor
  68  * systems, due to an erratum.  The Linux kernel says that "Even distro
  69  * kernels should think twice before enabling this", but for now let's
  70  * be conservative and leave the full barrier on 32-bit processors.  Also,
  71  * IDT WinChip supports weak store ordering, and the kernel may enable it
  72  * under our feet; cmm_smp_wmb() ceases to be a nop for these processors.
  73  */
  74 #if (CAA_BITS_PER_LONG == 32)
  75 #define cmm_mb()    __asm__ __volatile__ ("lock; addl $0,0(%%esp)":::"memory")
  76 #define cmm_rmb()    __asm__ __volatile__ ("lock; addl $0,0(%%esp)":::"memory")
  77 #define cmm_wmb()    __asm__ __volatile__ ("lock; addl $0,0(%%esp)":::"memory")
  78 #else
  79 #define cmm_mb()    __asm__ __volatile__ ("lock; addl $0,0(%%rsp)":::"memory")
  80 #define cmm_rmb()    __asm__ __volatile__ ("lock; addl $0,0(%%rsp)":::"memory")
  81 #define cmm_wmb()    __asm__ __volatile__ ("lock; addl $0,0(%%rsp)":::"memory")
  82 #endif
  83 #endif
  84
  85 #define caa_cpu_relax() __asm__ __volatile__ ("rep; nop" : : : "memory")
  86
  87 #define HAS_CAA_GET_CYCLES
  88
  89 #define rdtscll(val)                                                      \
  90         do {                                                              \
  91              unsigned int __a, __d;                                       \
  92              __asm__ __volatile__ ("rdtsc" : "=a" (__a), "=d" (__d));     \
  93              (val) = ((unsigned long long)__a)                            \
  94                         | (((unsigned long long)__d) << 32);              \
  95         } while(0)
  96
  97 typedef uint64_t caa_cycles_t;
  98
  99 static inline caa_cycles_t caa_get_cycles(void)
 100 {
 101         caa_cycles_t ret = 0;
 102
 103         rdtscll(ret);
 104         return ret;
 105 }
 106
 107 /*
 108  * On Linux, define the membarrier system call number if not yet available in
 109  * the system headers.
 110  */
 111 #if (defined(__linux__) && !defined(__NR_membarrier))
 112 #if (CAA_BITS_PER_LONG == 32)
 113 #define __NR_membarrier         375
 114 #else
 115 #define __NR_membarrier         324
 116 #endif
 117 #endif
 118
 119 #ifdef __cplusplus
 120 }
 121 #endif
 122
 123 #include <urcu/arch/generic.h>
 124
 125 #endif /* _URCU_ARCH_X86_H */