X-Git-Url: http://git.lttng.org/?a=blobdiff_plain;f=include%2Fust%2Fprocessor.h;h=6ee44ddde599f3bd8eb5e24d90295c800168e1be;hb=7f0357f05bf1dae6e371b04a6f94d6912f0a0303;hp=ba23612484964f4d76299df967832e0acf32802d;hpb=55c5b393e9b197033ed1a6a8cc8f179412c61bf6;p=ust.git diff --git a/include/ust/processor.h b/include/ust/processor.h index ba23612..6ee44dd 100644 --- a/include/ust/processor.h +++ b/include/ust/processor.h @@ -1,13 +1,33 @@ +/* Copyright (C) 2009 Pierre-Marc Fournier + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + #ifndef UST_PROCESSOR_H #define UST_PROCESSOR_H #include #include +#include extern __thread long ust_reg_stack[500]; extern volatile __thread long *ust_reg_stack_ptr; -#ifndef __x86_64 +#define ____cacheline_aligned __attribute__((aligned(CAA_CACHE_LINE_SIZE))) + +#ifdef __i386 struct registers { short ss; @@ -23,6 +43,15 @@ struct registers { long esp; }; +static inline int fls(int x) +{ + int r; + asm("bsrl %1,%0\n\t" + "cmovzl %2,%0" + : "=&r" (r) : "rm" (x), "rm" (-1)); + return r + 1; +} + #ifdef CONFIG_UST_GDB_INTEGRATION /* save_registers - saves most of the processor's registers so @@ -181,9 +210,11 @@ struct registers { #define RELATIVE_ADDRESS(__rel_label__) __rel_label__ +#define ARCH_COPY_ADDR(dst) "lea 2b," dst "\n\t" + #define _ASM_PTR ".long " -#else /* below is code for x86-64 */ +#elif defined(__x86_64) struct registers { int padding; /* 4 bytes */ @@ -208,6 +239,15 @@ struct registers { unsigned long rsp; }; +static inline int fls(int x) +{ + int r; + asm("bsrl %1,%0\n\t" + "cmovzl %2,%0" + : "=&r" (r) : "rm" (x), "rm" (-1)); + return r + 1; +} + #ifdef CONFIG_UST_GDB_INTEGRATION #define save_registers(regsptr) \ @@ -251,7 +291,7 @@ struct registers { /* Start TLS access of private reg stack pointer */ \ ".byte 0x66\n\t" \ "leaq ust_reg_stack_ptr@tlsgd(%%rip), %%rdi\n\t" \ - ".word 0x6666\n\t" \ + ".hword 0x6666\n\t" \ "rex64\n\t" \ "call __tls_get_addr@plt\n\t" \ /* --- End TLS access */ \ @@ -263,7 +303,7 @@ struct registers { /* Start TLS access of private reg stack */ \ ".byte 0x66\n\t" \ "leaq ust_reg_stack@tlsgd(%%rip), %%rdi\n\t" \ - ".word 0x6666\n\t" \ + ".hword 0x6666\n\t" \ "rex64\n\t" \ "call __tls_get_addr@plt\n\t" \ /* --- End TLS access */ \ @@ -379,8 +419,61 @@ struct registers { * in a relocatable way. On x86-64, this uses a special (%rip) notation. */ #define RELATIVE_ADDRESS(__rel_label__) __rel_label__(%%rip) +#define ARCH_COPY_ADDR(dst) "lea 2b(%%rip)," dst "\n\t" + #define _ASM_PTR ".quad " +#elif defined(__PPC__) + +struct registers { +}; + +static __inline__ int fls(unsigned int x) +{ + int lz; + + asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); + return 32 - lz; +} + +#define ARCH_COPY_ADDR(dst) \ + "lis " dst ",2b@h\n\t" /* load high bytes */ \ + "ori " dst "," dst ",2b@l\n\t" /* load low bytes */ + +#define _ASM_PTR ".long " +#define save_registers(a) + +#else /* arch-agnostic */ + +static __inline__ int fls(unsigned int x) +{ + int r = 32; + + if (!x) + return 0; + if (!(x & 0xFFFF0000U)) { + x <<= 16; + r -= 16; + } + if (!(x & 0xFF000000U)) { + x <<= 8; + r -= 8; + } + if (!(x & 0xF0000000U)) { + x <<= 4; + r -= 4; + } + if (!(x & 0xC0000000U)) { + x <<= 2; + r -= 2; + } + if (!(x & 0x80000000U)) { + x <<= 1; + r -= 1; + } + return r; +} + #endif #endif /* UST_PROCESSOR_H */